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What you'll be doing:
Verify the design and implementation of the industry's leading GPU
Responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
You are expected to understand complex mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Work closely with Multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks.
What we need to see:
Pursuing MS/PhD in EE with domain study in analog circuit design / mixed signal circuit design.
Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
Experience in crafting test bench environments for component and top level circuit verification
Expertise in System Verilog or similar HVLand strong debugging and analytical skills
Perl and C/C++ programming language experience desirable
Strong communication skills and ability & desire to work as a great teammate are huge plus.
These jobs might be a good fit

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What you'll be doing:
Be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra)
Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies.
Work closely with physical/layout engineers to floorplan and implement physical design of these functions.
Support debug, characterization and support product through high-volume production.
If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you.
What we need to see:
You have a MSEE or PhD in Electrical Engineering.
Proven understanding of analog circuit layout concepts in submicron CMOS technologies
You have interests in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC.
Able to communicate in spoken and written English
Work effectively in a team, good communication skills, enthusiasm and positive energy.
Proficiency in scripting languages like perl, python, skill etc.
Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
You are an expert with Cadence custom circuit design tools - particularly virtuoso
Experience running and debugging DRC and LVS with verification tools

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What you'll be doing:
Be part of an analog team building next generation NVLINK.
You will be responsible for the development and implementation of high speed interfaces, including TX/RX/Clocking/PLL.
Work closely with physical/layout engineers to floorplan and implement physical design of these functions.
Support debug, characterization and support product through high-volume production.
What we need to see:
MS / PhD in Electrical Engineering, Computer Engineering or related field with strong analog design background.
CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET); Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA)
You have interests in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC.
Able to communicate in spoken and written English
Work effectively in a team, good communication skills, enthusiasm and positive energy.
Proficiency in scripting languages like perl, python, skill etc.
You are an expert with Cadence custom circuit design tools - particularly virtuoso
Experience running and debugging DRC and LVS with verification tools

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What you’ll be doing:
You will work with ground breaking technologies for the Tegra SoC and various NVIDIA embedded platforms
Implement power and thermal management software features in Linux Kernel and user space
Collaborate with power architects, hardware and software engineers on usecase power estimation, power and performance optimization
What we need to see:
MS in CS, CE, EE, Systems Engineering or related software/hardware engineering major
Software development experience with a significant focus on Linux
Excellent Cprogramming/debuggingskills within Linux kernel and user space software
Background with working on embedded systems and ARM processor specific
System-level debugging experience and problem-solving skills
Excellent communication skills
Ways to stand out from the crowd:
Experience in working with the Linux and open-source software communities
Understanding of the Linux power management features (scheduler, dynamic frequency scaling, runtime power management, suspend to RAM), factors influencing power efficiency at chip and platform.

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What you’ll be doing:
Develop in-house software to enable advanced testing on NVIDIA hardware.
Create automation flows to support ATPG and DFT requirements.
Optimize software performance and drive quality improvements.
Collaborate closely with Design, DFT, and Test Engineering teams to ensure test quality, improve efficiency, and support silicon bring-up.
What we need to see:
Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
Strong programming skillsin Python and C++ (required).
Experience with TCL, Perl, Java, or other programming languages is a plus.
Strong communication skills with the ability to work effectively in a team environment.
Fluency in English (spoken and written).
Ways to stand out from the crowd:
Knowledge of Design for Testability (DFT) concepts, including Scan, ATPG, and JTAG.

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What you'll be doing:
Develop automation test infrastructure-based data center
Work closely with AI infrastructure engineer to develop FW/OS feature testing
Strong ability to work independently, given requirements
Strong Linux development and debugging experience
Demonstrable comprehension of Information Security, including malware, emerging threats, charges, and vulnerability management
What we need to see:
Master’s degree in computer science or electrical engineering
Experienced in effectively bringing to bear AI and knowledgeable in CI/CD tools
Strong Python/C++ programming skills
Excellent communication and social skills
Excellent data analysis skills and the ability to resolve issues involving sophisticated systems
Good at English read/write/speak

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What you’ll be doing:
Work with customers to provide deep technical assistance in NVIDIA requirements into customer platforms and rack solutions in the datacenter.
Assist to achieve fully optimized design with NVIDIA products and provide customer feedback as to product features and software enhancement.
Work for customers Datacenter platform brings up, issues analysis and root cause till mass production.
Required tools development focus on NVIDIA Datacenter product segments needed.
Provide tech training to customers for new Datacenter product engagement.
Domestic and overseas travel will be required if needed.
What we need to see:
BS or MS degree (or equivalent experience) in Computer Science/ComputerEngineering/ElectricalEngineering or a related field.
5+ years of significant software development experience.
The Server System Architecture skill.
Experience in developing server BIOS features, including security and UEFI implementation. Additionally, having BMC implemented will be another plus.
Familiar with Linux/BMC skills/operations.
Skills in C/C++ and Python will be a plus.
Excellent communication skills, flexibility in task assignments, and working under pressure.
Ways to stand out from the crowd:
Strong oral & written communication skills (both English and Chinese).
Self-motivated and aggressive to learn.

Share
What you'll be doing:
Verify the design and implementation of the industry's leading GPU
Responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
You are expected to understand complex mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Work closely with Multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks.
What we need to see:
Pursuing MS/PhD in EE with domain study in analog circuit design / mixed signal circuit design.
Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
Experience in crafting test bench environments for component and top level circuit verification
Expertise in System Verilog or similar HVLand strong debugging and analytical skills
Perl and C/C++ programming language experience desirable
Strong communication skills and ability & desire to work as a great teammate are huge plus.
These jobs might be a good fit