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What you will be doing:
Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints.
Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes.
Power estimation and power modeling.
What we need to see:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of experience in physical design and/or BE power optimization aspects.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage.
FE design experience is an advantage.
Excellent problem-solving, partnership, and interpersonal skills.
These jobs might be a good fit

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CyberArk is looking for an experienced Staff Software Engineer for our new Authentication service. You will be responsible for building this core SaaS service, built on-top of AWS using .NET, EKS, Terraform and other cloud technologies. You will be working with an elite team to produce top-notch services at the highest standards, meeting the high security, stability, and performance standards of the largest enterprises in the world.

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Yield engineers play a critical role in analyzing production data, identifying process deviations, and driving improvements to maximize product quality and output. As a Yield student, you will work alongside experienced engineers, support real-time manufacturing needs, and contribute to the continuous improvement of yield performance.
Responsibilities:
• Collect, analyze, and interpret inline and yield data from manufacturing processes.
• Identify trends, anomalies, and root causes for inline deviations and yield loss using statistical tools and engineering methods.
• Collaborate with process, equipment, and integration engineers to propose and implement corrective actions.
• Support the development and validation of models for process control and optimization.
• Document and communicate results clearly to cross-functional teams.
Why Join Us?
• Be part of a high-impact team driving quality and efficiency in semiconductor manufacturing.
• Gain hands-on experience with advanced technologies and data-driven engineering.
• Work in a dynamic, supportive environment with opportunities for growth and learning.
• M.Sc. student in Materials Engineering, Chemical Engineering, Mechanical Engineering, or Data Science.
• Strong analytical skills and experience in data analysis and problem-solving.
• High level of initiative and ability to self-learn.
• Experience with data analysis tools such as Python, JMP, Excel, or similar-advantage.
• Solid understanding of manufacturing operations and statistical process control-advantage.
• Ability to multitask and work under tight deadlines.
• Ability to work at least 20 hours per week (2.5 days a week).
• At least 2 years until graduation-required.

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Engineering groups lead continuous improvement of processes and tools stability, reduce variance, cost reductions projects, and meet targets in an optimal way.
What will you do?
What are we looking for?

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What are we looking for?
• BSc./MSc./PhD student in Materials Engineering, Chemical Engineering, Mechanical Engineering, or Data Science.
• Strong analytical skills and experience in data analysis and problem-solving.
• High level of initiative and ability to self-learn.
• Experience with data analysis tools such as Python, JMP, Excel, or similar-advantage.
• Solid understanding of manufacturing operations and statistical process control-advantage.
• Ability to multitask and work under tight deadlines.
• Ability to work at least 20 hours per week (2.5 days a week).
• At least 2 years until graduation-required.

Share
What you will be doing:
Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints.
Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes.
Power estimation and power modeling.
What we need to see:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of experience in physical design and/or BE power optimization aspects.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage.
FE design experience is an advantage.
Excellent problem-solving, partnership, and interpersonal skills.
These jobs might be a good fit