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What you will be doing:
Join Beer-Sheva/Tel-Aviv group, working ondesigning/verificationin the fields of encryption.
Design and verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve design/verification and might involve any or all aspects of chip development including design and micro-architecture.
Work closely with firmware and other groups around the globe.
What we need to see:
B.SC./M.SC. or equivalent experience in ElectricalEngineering/CommunicationEngineering/Computer Engineering
0+ years of validated experience in RTL Frontend ASIC Verification or Design (Chip Design)
High Level of English
Ways to stand out from the crowd:
Former experience in RTL Frontend ASIC Verification: 2+ years
Knowledge in Specman
Knowledge in Verilog
These jobs might be a good fit

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This position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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What you’ll be doing:
Work on NVIDIA current and next generation of Networking devices and GPU.
Build and create Firmware Phy solutions for our new SerDes and physical linkup flow.
Work closely with our costumer support team to build solutions for our costumers
Work with the architecture, HW, and SW design teams
Debug and screen HW/FW/SW issues
Lead data-driven discussions about the product functionality and areas for improvement
Define implement and maintain FW algorithm to control the Silicon
Take an active part in silicon bring-up and SW development phases
What we need to see:
B.Sc. or M.Sc. in Electrical or Computer Engineering
3+ years of relevant experience
Proficient programming in C
Experience working in Git.
Debugging experience and ability to investigate and triage difficult problems in embedded FW
Good communication skills and the ability to work with people across several countries
Ability to work with interrupts and dynamic environment with good spirit.
Excellent English verbal and written communication skills
Ways to stand out from the crowd:
Proficient in Python
Good understanding of SerDes operation
Experience with developing the physical layer of communication protocols
Knowledgeable of Hardware/Software Development Process
Strong collaborative and interpersonal skills, with an ability to successfully guide and influence

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What you'll be doing:
As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:
Understand and analyze uArch definitions.
Implement verification components to verify RTL meets specifications.
Collaborate with our RTL, Arch and uArch teams.
Work on logic related to switch design.
What we need to see:
A Bachelor’s Degree in Electrical Engineering, Computer Engineering or Computer Science, or equivalent experience.
5+ years of hardware description language expertise and verification background required
Strong communication and interpersonal skills are required along with the work in a dynamic environment.
A strong background in computer communication is highly desirable.
Ways to stand out from the crowd:
Experience with computercommunication/networking

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Your expertise will transform our infrastructure and deployment. You'll design scalable cloud architectures to accelerate innovation, champion a world-class DevOps culture to empower developers, and build the foundation for our future growth.
This position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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Unify online/offline for features: Drive Flink adoption and patterns that keep features consistent and low-latency for experimentation and production.
Make self-serve real: Build golden paths, templates, and guardrails so product/analytics/DS engineers can move fast safely.
Run multi-tenant compute efficiently: EMR on EKS powered by Karpenter on Spot instances; right-size Trino/Spark/Druid for performance and cost.
Cross-cloud interoperability: BigQuery + BigLake/Iceberg interop where it makes sense (analytics, experimentation, partnership).
What you'll be doingThis position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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What you will be doing:
Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints.
Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes.
Power estimation and power modeling.
What we need to see:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of experience in physical design and/or BE power optimization aspects.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage.
FE design experience is an advantage.
Excellent problem-solving, partnership, and interpersonal skills.

What you will be doing:
Join Beer-Sheva/Tel-Aviv group, working ondesigning/verificationin the fields of encryption.
Design and verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve design/verification and might involve any or all aspects of chip development including design and micro-architecture.
Work closely with firmware and other groups around the globe.
What we need to see:
B.SC./M.SC. or equivalent experience in ElectricalEngineering/CommunicationEngineering/Computer Engineering
0+ years of validated experience in RTL Frontend ASIC Verification or Design (Chip Design)
High Level of English
Ways to stand out from the crowd:
Former experience in RTL Frontend ASIC Verification: 2+ years
Knowledge in Specman
Knowledge in Verilog
These jobs might be a good fit