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What you will be doing:
Study and develop cutting-edge techniques in deep learning, graphs, machine learning, and data analytics, and perform in-depth analysis and optimization to ensure the best possible performance on current- and next-generation GPU architectures.
Work directly with key customers to understand the current and future problems they are solving and provide the best AI solutions using GPUs.
Collaborate closely with the architecture, research, libraries, tools, and system software teams at NVIDIA to influence the design of next-generation architectures, software platforms, and programming models.
What we need to see:
A Masters degree or PhD in an engineering or computer science related discipline or equivalent experience and 2+ years of relevant work or research experience.
Strong knowledge of C/C++, software design, programming techniques, and AI algorithms.
Firsthand work experience with parallel programming, ideally CUDA C/C++.
Strong communication and organization skills, with a logical approach to problem solving, good time management, and task prioritization skills.
Some travel is required for conferences and for on-site visits with developers.
These jobs might be a good fit

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This role will be an integral part of our Sales Operations team, providing expertise in sales compensation administration. You will work closely with cross-functional teams (Sales, Marketing, Finance, HR, and IT ) to improve workflows, uphold data quality, and generate actionable insights that enhance business performance. You will lend critical analytical and technical support to the successful administration of sales compensation programs globally.
You will aggressively build relationships, champion open dialogue, and provide creative solutions to issues in real-time.
This is a hybrid position based in our Bangalore office. General working hours for this role will be 2pm-11pm IST during the weekdays.
What you'll be doingThis position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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What you'll be doing:
In this position, you will expected to lead all block/chip level PD activities.
PD activities includes floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification. Work in collaboration with design team for addressing design challenges.
Help team members in debugging tool/design related issues.
Constantly look for improvement in RTL2GDS flow to improve PPA. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention.
Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
What we need to see:
BE/BTECH/MTECH, or equivalent experience.
4+ years of experience in Physical Design.
Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure.
Expertise on high frequency design methodologies. Good knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification. Working experience with tools like ICC2/Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation.
Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. Well versed with timing constraints, STA and timing closure.
Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools.
Ability to multi-task and flexibility to work in global environment.
Good communication skills and strong motivation, Strong analytical & Problem solving skills. Proficiency using Perl, Tcl, Make scripting is preferred.

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This position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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What you'll be doing:
As a member of Aerial RAN team working on AI Native stacks, you will be contributing to
Develop and Optimize AI / ML modules for functional blocks specifically in wireless signal processing
Perform literature survey to understand the prior art on AI/ML for RAN
Analyze and identify the suitable ML architecture for the RAN functions of interest.
Identify the right ML Architecture, complexity for each of the functional blocks
Collaborate with multi-functional teams to optimize the OTA performance and compute complexity with DevTech and other business units within NVIDIA
Benchmarking of OTA performance improvements with AI models and compute needs on different platforms
Iteratively train, test & modify Model Arch for performance improvements
What we need to see:
Full time PhD student doing research in the fields of AI and Wireless domains, and able to work as an Intern for at least 6 months or more starting from last week of January 2026
Thorough understanding of the wireless Layer1/Layer2 functions and algorithm aspects
Excellent grip on AI and ML concepts, techniques and abreast of latest developments in this field
Deep understanding of Transformers, CNNs and other ML Architectures and their use cases
Hands on experience in simulating signal processing algorithms in Matlab and Python.
Programming skills in C/C++
Experience in analyzing the problem, identifying the right model architectures. developing Models, Training and Optimization, preferably on signal processing domains
from the crowd:
Knowledge of CPU, DSP or GPU architecture, as well as memory, I/O and networking interfaces.
Experience with programming latency sensitive, real-time, multi-threaded applications on CPUs and one or more of GPUs or DSPs or Vector processors.
Appetite to learn the details of how next generations of GPU will operate and build an outstanding Software-Radio 5G/6G stack that can fully demonstrate their power.
Familiarity with CUDA programming and NVIDIA GPU Architectures

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This position requires working during late evening hours from 2 PM to 11 PM (IST), with a 1-hour lunch break included. Are you available to work during these Non-Shift hours?
What you'll be doingThis position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

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What you’ll be doing:
Own ASIC verification of IP/Cluster for complicated designs in RTL.
Work with HW architects and designers to make the right implementation choices.
Interact with the Performance verification teams to augment verification through dynamic simulations and/or Formal verification techniques.
You will work with the specifications and ensure functional and code coverage of all the RTL which you will verify.
Partner with and enable FPGA and S/W teams to ensure that S/W is tested.
Be involved with post-silicon verification and debug.
What we need to see:
BS / MS or equivalent experience.
2+ years of design experience.
Experience in ASIC verification of complex design units for at least one or two projects.
Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
Exposure to System Verilog and UVM based methodology for ASIC verification is highly desired.
Ways to stand out from the crowd:
Knowledge of Memory controllers or prior experience with verification of IP/clusters involving access to Memory.
Good debugging and problem solving skills.
Scripting knowledge (Python/Perl/shell).
Good interpersonal skills and ability & desire to work as a part of a team.

What you will be doing:
Study and develop cutting-edge techniques in deep learning, graphs, machine learning, and data analytics, and perform in-depth analysis and optimization to ensure the best possible performance on current- and next-generation GPU architectures.
Work directly with key customers to understand the current and future problems they are solving and provide the best AI solutions using GPUs.
Collaborate closely with the architecture, research, libraries, tools, and system software teams at NVIDIA to influence the design of next-generation architectures, software platforms, and programming models.
What we need to see:
A Masters degree or PhD in an engineering or computer science related discipline or equivalent experience and 2+ years of relevant work or research experience.
Strong knowledge of C/C++, software design, programming techniques, and AI algorithms.
Firsthand work experience with parallel programming, ideally CUDA C/C++.
Strong communication and organization skills, with a logical approach to problem solving, good time management, and task prioritization skills.
Some travel is required for conferences and for on-site visits with developers.
These jobs might be a good fit