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What you'll be doing:
Be part of a cross-business-unit team and own the high-speed IP integration.
Build a Chiplet floorplan layout design from early assembly/planning through implementation and signoff.
Work closely with partition owners and Full Chip STA engineers to assure high quality and timely convergence.
Define and implement efficient, high-quality Chiplet level physical design tools, flows, and methodologies.
Gain hands-on experience implementing the partition-level BE design (RTL2GDS).
What we need to see:
Great teammate
BSEE / MSEE or equivalent experience.
8+ years experience in physical design
Experience in unit and top-level floor planning, bump and RDL layout, full-chip clock tree, power grid planning, and DRC/LVS.
In depth knowledge of physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
You will also be eligible for equity and .
These jobs might be a good fit

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What you'll be doing:
Lead, build, and drive the architecture and engineering alignment for key automotive customer projects through all phases, from bringup to production and post-production, using the DRIVE platform.
Architect and build a seamless integration environment to amplify the scalability of our software solutions for our partners.
Collaborate with senior leaders across the company to evolve the product initiatives, roadmaps, and processes. Drive innovation bringing in new technologies.
Lead bring-up activities and provide deep technical guidance and strategies to resolve functional and system performance issues, working with internal and external partner teams.
Collaborate with our global engineering teams in our US, APAC, and Europe locations to deploy the solution to our customers.
What we need to see:
BE/BS or MS in computer science, robotics, computer engineering, or equivalent experience.
Understand the technological evolution in the self driving industry.
15+ years of deep hands-on technical experience.
Extensive strong technical leadership experience across large-scale organizations.
Established proficiency in application development and scalability for autonomous machines, and familiarity with robotics or automotive related middleware frameworks.
Broad and deep technical knowledge across software and hardware.
Proven ability to lead teams across multiple hardware, software and business groups through design and implementation.
Excellent communication and interpersonal skills and the ability to influence large organizations in meaningful ways.
Ways to stand out from the crowd
Familiar with automotive design processes and norms (e.g. ISO 26262, ASPICE), including in-vehicle testing, simulation and metrics development of autonomous driving systems.
Software development experience on QNX or equivalent RTOS.
Applied knowledge in resolving sophisticated, interrelated issues emanating from sensors to other embedded controllers on the vehicle and from interactions between applications.
Knowledge of GPU programming such as OpenCL or CUDA and understanding of the NVIDIA DRIVE platform.
Contributions to or ownership of open-source project and mentorship experience.
You will also be eligible for equity and .

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NVIDIA is seeking a Sr. Systems Software Engineer for the Apache Spark Acceleration group. Over the past five years GPU accelerated data processing has moved from proof of concept to production deployments. Many enterprises are now recognizing the needs of accelerated computing to handle their large data processing needs. Multi-node GPU deployments will reduce cloud computing costs and lower latency batch ETL workloads.
At NVIDIA, we have been invested in accelerating Apache Spark, providing an open source plugin for Apache Spark. Apache Spark is the most popular data processing engine in data centers. We strive to accelerate Spark applications on GPUs without any code changes. We are passionate about working on hard problems that have an impact. You will need to have strong programming skills, a deep understanding of software development related to C++. You will work with a team that is using open source libraries like RAPIDS to accelerate reading, writing and batch data operations in Spark.
What you'll be doing:
Develop CUDA/C++ libraries to accelerate DataFrames and I/O operations on common file formats such as Parquet, ORC and JSON
Collaborate with distributed systems teams to craft solutions to distributed processing problems challenges at large scale
Work with open source communities to enhance libraries like RAPIDS, CCCL and UCX through technical discussion and code contributions
Provide recommendations and feedback to teams regarding decisions surrounding topics such as infrastructure, continuous integration and testing strategy
Build, test and optimize CUDA/C++ libraries across different platforms
What we need to see:
BS, MS, or PhD in Computer Science, Computer Engineering, or closely related field (or equivalent experience)
12+ years of work experience in software development
Outstanding technical skills in designing and implementing high-quality distributed systems
Excellent programming skills in C++, Java, and/or Scala
Ability to work with teams across organizational boundaries and geographies
Highly motivated with strong interpersonal skills
OS kernel dev experience is a strong plus
You will also be eligible for equity and .

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What you'll be doing:
Use AI to solve product challenges in gaming and other interactive experiences.
Build upon the latest research to create world-class conversational pipelines for AI assistants and agents.
Improve and fine-tune language models and retrieval-augmented generation solutions for accuracy and performance.
Build prototypes to demonstrate real-life applications of your ideas and to accelerate productization.
Collaborate with NVIDIA's internal and external teams, including AI/DL researchers, hardware architects, and software engineers.
Participate in technology transfers to and from teams across NVIDIA.
What we need to see:
PhD or Master’s degree in Computer Science/Engineering, Machine Learning, AI, or related fields; or equivalent experience.
12+ years of work experience with last 5+ years focused on language models, AI assistants, and agents.
Proficiency in C, C++, and Python, with the ability to write high-performance production code.
Experience with GPU programming, CUDA, and system optimizations is a significant plus.
A track record of proven research excellence, demonstrated through presentations, demos, or publications at leading venues such as GDC, ICCV/ECCV, SIGGRAPH, or other research artifacts such as software projects or significant product development.
AI-powered machines can learn, reason, and interact with people, thanks to GPU deep learning. We offer competitive salaries and great benefits as a top tech employer with leading talent.
You will also be eligible for equity and .

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What you’ll be doing:
Perception experts with application focus will be on multi-sensor fusion based deep learning model development for obstacle perception/fusion in complex driving environments.
Applied research and development of innovative deep learning and multi-sensor fusion algorithms to improve output accuracy of 3D obstacle perception solutions under challenging and diverse scenarios, with a focus on high-resolution world reconstruction (e.g., occupancy networks).
Identify and analyze the strength and weakness of the developed 3D obstacle perception solutions using large scale benchmark data (both real and synthetic) and improve them iteratively through KPI building and optimization. This includes careful data verification, model architecture design, understanding details of loss function engineering, and being capable of finding detailed ML bugs and iterating toward perfection.
Productize the developed 3D obstacle perception solutions by meeting product requirements for safety, latency, and SW robustness, with a strong emphasis on production deep learning model development.
Drive and prioritize data-driven development by working with large data collection and labeling teams to bring in high value data to improve perception system accuracy. Efforts will include data collection prioritization and planning, labeling prioritization, so that value of data is maximized.
What we need to see:
10+ years of hands-on work experience in developing deep learning and algorithms to solve sophisticated real world problems, and proficiency in using deep learning frameworks (e.g., PyTorch).
Experience in multi-sensor fusion (cameras, ultrasonic sensors, radar) for perception tasks, particularly in high-resolution world reconstruction.
Proven experience in production deep learning model development, including careful data verification, model architecture design, loss function engineering, and debugging ML models.
Experience in data-driven development and collaboration with data and ground truth teams.
Strong programming skills in python and/or C++.
Outstanding communication and teamwork skills as we work as a tightly-knit team, always discussing and learning from each other.
BS/MS/PhD in CS, EE, sciences or related fields (or equivalent experience)
Ways to stand out from the crowd:
Experience on end-to-end deep learning model development is a plus.
Proven expertise in developing perception solutions for autonomous driving or robotics using deep learning with multi-sensor input.
Hands-on experience in developing and deploying DNN-based solutions to embedded platforms for real time applications.
Good understanding of fundamentals of 3D computer vision, camera calibrations including intrinsic and extrinsic, and sensor fusion principles.
Experience with development in CUDA language. The ability to implement CUDA kernels as part of training or inference pipelines.
You will also be eligible for equity and .

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What you’ll be doing:
As a Software Development Engineer in Test, you will take part in technical design and implementation of tests for NVIDIA software products with the goal to identify defects early in the software development lifecycle. You will also build tools that accelerate execution workflows for the organization. In this role you can expect to:
Design and implement automated tests incorporating AI technologies for NVIDIA's device driver software and SDKs on various Windows and Linux operating systems.
Develop automated end to end tests for NVIDIA device driver and SDKs on windows platform. Execute manual and automated tests, identify, and report defects. Measure code coverage, analyze and drive code coverage improvements.
Develop applications and tools that bring data driven insights to development and test workflows.
Build tools/utility/framework inPython / C / C++ which would help automate and optimize the testing workflows in GPU domain.
Write maintainable, reliable, and well detailed code. Debug issues to identify the root cause. Provide peer code reviews including feedback on performance, scalability, and correctness
Optimally estimate and prioritize tasks in order to create a realistic delivery schedule and work on challenging technical and process issues.
Generate and test compatibility across a range of products and interfaces.
Work closely with leadership to report progress by generating effective and impactful reports
What we need to see:
B.E./B. Tech degree inComputer Science/IT/Electronics engineeringwith strong academics or equivalent experience
5+ years of programming experience in Python/C/C++ with experience in applying Object-Oriented Programming concepts.
Hands-on knowledge of developing Python scripts with application development concepts like dictionaries, tuples, RegEx, PIP etc.
Good experience with using AI development tools for test plans creation, test cases development and test cases automation
Experience with testing RESTful APIs and the ability to conduct performance and load testing to ensure the application can handle high traffic and usage.
Experience working with databases and storage technologies like SQL and Elasticsearch
Good understanding of OS fundamentals, PC Hardware and troubleshooting.
Skillful at debugging issues and have experience using debugging tools like WinDBG/gdb
The ability to collaborate with multiple development teams to gain knowledge and improve test code coverage
Excellent written, verbal, analytical and problem-solving skills and ability to work with a team of engineers in a fast paced environment
Ways to stand out from the crowd:
Prior project experience with building ML and DL based applications would be a plus
Good understanding of testing fundamentals
Good problem solving skills (solid logic to apply in isolation and regression of issues found).
You will also be eligible for equity and .

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What You’ll Be Doing:
Take charge of the technical integration of quantum hardware (neutral atom, trapped ion, superconducting) with HPC systems via APIs, middleware, and orchestration layers like CUDA-Q.
Formulate and refine hybrid workflows to enable seamless task distribution between GPU clusters and quantum devices.
Partner closely with quantum hardware suppliers to set up connectivity, control interfaces, and co-design specifications to improve performance, decrease latency, and enable data exchange.
Partner with internal scientists and engineers to install & optimize applications, deploy hybrid workloads, and evaluate system performance.
Work with control systems engineers to ensure environmental, timing, and data interfaces meet quantum hardware requirements.
Prototype and benchmark hybrid applications in materials science, chemistry, optimization, and machine learning to showcase platform capabilities.
Contribute to roadmap planning for adding new quantum modalities (superconducting, photonic) and integrating emerging SDKs.
Represent NVIDIA at technical conferences, workshops, and industry forums, showcasing our advancements and groundbreaking efforts.
Develop comprehensive user documentation and integration guides for internal use and cross-team collaboration.
Drive continuous improvement across software stacks, orchestration layers, and data pipelines connecting quantum and HPC domains.
What We Need to See:
12+ years of experience in HPC system administration, Linux, Slurm, application support, and data management.
Experience with quantum programming frameworks like CUDA-Q, Qiskit, PennyLane, Cirq, Braket, and more.
Proficiency in Python, C++, or Rust for API integration and workflow automation.
Strong understanding of HPC systems, Slurm orchestration, and GPU-accelerated computing environments.
Understanding of quantum hardware systems encompassing neutral-atom, trapped-ion, superconducting, or photonic technologies.
Bachelor’s or Master’s degree or equivalent experience in Physics, Electrical/Computer Engineering, or Computer Science (PhD preferred).
Outstanding communication and collaborator management skills, with the ability to engage both experimental scientists and systems engineers.
Ways to Stand Out from the Crowd:
Demonstrated track record collaborating with quantum hardware providers.
Deep understanding of quantum-classical orchestration frameworks and low-latency data transfer architectures.
Familiarity with cloud-based quantum services and HPC integration standards.
Contributions to open-source quantum frameworks or involvement in academic collaborations.
Success in bridging experimental physics and HPC engineering teams.
Experience representing an organization in technical standards bodies or research consortia.
You will also be eligible for equity and .

Share
What you'll be doing:
Be part of a cross-business-unit team and own the high-speed IP integration.
Build a Chiplet floorplan layout design from early assembly/planning through implementation and signoff.
Work closely with partition owners and Full Chip STA engineers to assure high quality and timely convergence.
Define and implement efficient, high-quality Chiplet level physical design tools, flows, and methodologies.
Gain hands-on experience implementing the partition-level BE design (RTL2GDS).
What we need to see:
Great teammate
BSEE / MSEE or equivalent experience.
8+ years experience in physical design
Experience in unit and top-level floor planning, bump and RDL layout, full-chip clock tree, power grid planning, and DRC/LVS.
In depth knowledge of physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
You will also be eligible for equity and .
These jobs might be a good fit