Senior Research Scientist Generative Ai jobs at Nvidia

What You’ll Be Doing:

Lead the product strategy and execution for NVIDIA’s Omniverse Digital Twin platform focused on Digital Twin robotics and automation integration use cases. Drive cross-functional alignment and deliver features that enable scalable, Physical AI-powered simulation solutions.

• Define and manage roadmap, use cases, and user journeys for industrial digital twins

• Translate customer needs into clear, prioritized requirements

• Partner with engineering to drive execution and technical trade-offs

• Serve as a voice of the customer across development and GTM teams

• Mentor and guide junior PMs to grow product leadership capacity

• POR & One-page summaries of strategic intent

• Product roadmap with quarterly milestones and long-term vision

• PRDs with use cases, personas, and workflows

• Capability and release launch plans in coordination with GTM and engineering

What We Need To See:

• 7+ years in product management, including experience owning sophisticated platform or developer-facing products.

• BS or MS in Computer Science, Engineering, or equivalent experience.

• Confident navigating cross-functional leadership and high-stakes decision-making, with the ability to lead product initiatives and drive alignment.

• Background in robotics, automation, simulation, or digital twins — or a proven track record to ramp up quickly in highly technical domains.

• A strategic and systems thinker, equally comfortable defining big-picture vision and execution details.

• Experience in both startup and large enterprise settings; adaptable, pragmatic, and process-aware.

Ways To Stand Out From The Crowd:

• Strong sense of purpose and ownership, with an ability to prioritize, deliver product, and encourage those around you.

• Humble, collaborative, and curious, always seeking new ways to tackle problems and empower your team.

What You Will Be Doing:

• Bring new products and new technologies to high volume manufacturing

• Deliver datamation solutions for enhanced decision making

• Manage supplier performance evaluation matrix and keep it updated based on changing business needs

• Drive continuous improvement in manufacturing yield, cycle time and product quality/reliability

• Lead change control through qualification and notification

• Lead non-conforming material disposition

• Manage BOM supply chain and optimize sourcing solutions for best capacity and cost

What We Need To See:

• Master’s degree or higher in Engineering or Science with emphasis on Mechanical, Materials Science, Chemical Engineering fields (or equivalent experience)

• 12+ years of validated experience in Flip Chip semiconductor packaging design, process and materials development. Direct experience in advanced assembly technologies such as 2.5D/3D packaging, Photonics packaging experience is desirable

• Solid technical knowledge of materials, process, package design and equipment technologies in substrate, bumping, and chip assembly

• Strong skills in project management and supplier management

• Solid understanding of quality control, statistics process control, gage R&R and DOE techniques

• Good knowledge of packaging industry and its supply chain

• Excellent written and verbal communication skills

• Experience working with multi-functional teams across the world

What you'll be doing:

• Path-find technical innovations in Quantum Error Correction and Fault Tolerance, working with multi-functional teams in Product, Engineering, and Applied Research

• Develop novel approaches to quantum error correction codes and their logical operations, including methods for implementation and logical operation synthesis

• Research and co-design improved methods to achieve fault tolerance, such as techniques for logical operations, concatenation, synthesis, distillation, cultivation, or others

• Collaborate with internal teams and external partners on developing technology components to enable a fault-tolerant software stack integrated with quantum hardware

• Adopt a culture of collaboration, rapid innovation, technical depth, and creative problem solving

What we need to see:

• Degree in Physics, Computer Science, Chemistry, Applied Mathematics, or related engineering field or equivalent experience (Ph.D. preferred)

• Extensive background in Quantum Information Science with 8+ overall years of experience in the Quantum Computing industry

• A demonstrated ability to deliver high impact value in quantum error correction and fault tolerance

Ways to stand out from the crowd:

• Hands-on experience in scientific computing, high-performance computing, applied machine learning, or deep learning

• Experience with co-design of quantum error correction with quantum hardware or quantum applications

• Experience with CUDA and NVIDIA GPUs

• Passion to drive technology innovations into NVIDIA software and hardware products to support Quantum Computing

What you'll be doing:

• Ensuring NVIDIA’s technology investments are protected by actively participating in the process of obtaining patent protection. You’ll be doing outreach and providing training, education, and counsel to internal clients on patent filing and acquisition, and freedom of action.

• Instructing and directing Outside Counsel on patent application drafting, filing, and prosecution (domestic and foreign) to ensure compliance with NVIDIA guidelines and local laws.

• Making strategic decisions to develop our patent portfolio to proactively meet emerging trends and address changing demands.

• Partnering with other members of the Legal Department on assorted intellectual property related matters, such as assertions, patent portfolio valuation and assessment during transactions and corporate mergers and acquisitions, and IP licensing.

• Developing subject matter expertise and driving team client counseling, invention harvesting, and evaluation for specific IP-active areas.

• Participating in and providing counsel for NVIDIA contributions to Standards Setting Organizations, University Collaborations, Industry Workgroups, and Technology Conferences.

• Collaborating on development and deployment of Patent Department policies, practices, and tools.

What we need to see:

• A technical undergraduate degree (or equivalent experience), preferably a CE or Computer Science degree.

• 10+ years of relevant experience including experience as in-house counsel in patent preparation and prosecution, strategic portfolio development, foreign filing, and licensing.

• A J.D. degree with a record of strong academic performance and a license to practice law in California.

• Registration to practice before the US Patent and Trademark Office.

• Outstanding interpersonal skills: written and verbal, organizational abilities, and attested attention to detail.

• Ability to navigate and break down complex legal issues into actionable advice covering a broad range of interdependent issues, balance risk with business need, and ask tough questions.

Ways to stand out from the crowd:

• Experience in a high-tech industry, and familiarity with generative and applied artificial intelligence architecture and frameworks, software engineering, chip or circuit design, and advanced computing and networking technologies.

• A passion for innovation, technology, and continuous learning.

• Strong understanding of open source software and database licenses.

Collaborating with your peers across various engineering groups, you will optimally launch new systems for NVIDIA HGX GPU Accelerated Server Platforms to production. These purpose-built systems are optimized for the growing Deep Learning, Artificial Intelligence, and Analytics environments. With world-class technology enablingnever-been-seen-beforeperformance levels, NVIDIA’s HGX portfolio is arguably the most complicated systems platform ever developed by humans. This product family represents the company’s fastest growing line of business as well as its largest total available market opportunity. You will bring to bear your knowledge of system architectures and GPU technology in order to productize new GPU boards for datacenter architectures with GPU-accelerated clusters. Your responsibilities will include planning and establishing processes, defining test requirements and optimizing the production line to deliver new GPU boards. You will also be instrumental in helping the team to achieve the desired cost and quality metrics considered outstanding.

This position will be based out of Dallas, Texas.

What you will be doing:

• Use your in-depth experience with high speed networks and signals to plan and develop new diagnostic tests and debug procedures for next gen products

• Use your knowledge of system power-up and handshakes during boot to debug complex interactions between HW, FW and SW on faulty boards

• Recommend, drive and ensure compliance to DFx requirements for robust signal integrity performance as related to layout, mechanical components, assembly procedures, etc.

• Develop and deliver test specs for system level manufacturing screens for all new products to meet the required HW coverage, quality and product requirements.

• We collaborate with CM to define product assembly line, number of test stations and number of assembly fixtures, optimized for cost and efficiency.

• Craft creative solutions and WARs through volume data analysis and lab experimentation to solve meaningful yield and test problems.

• We lead optimization and continuous improvement efforts on the production screen spec definition processes to minimize waste and meet test time, yield, DPPM requirements.

• Support customer facing and quality teams during partner concerns to understand the issue and fix gaps identified in coverage.

What we need to see:

• BS or MS degree in EE/CE or equivalent experience.

• 5+ years of meaningful industry experience.

• Strong EE fundamentals, knowledgeable in digital design, signal integrity, statistics, timing analysis, fault analysis, sampling and computer architecture.

• Ways to stand out from the crowd:

• Prior board/system level electrical design experience.

• Experience with Perl, C/C++, Windows, and Linux.

What you’ll be doing:

• Understand, analyze, profile, and optimize AI training workloads on state-of-the-art hardware and software platforms.

• Guide development of future generations of artificial intelligence accelerators and systems.

• Develop detailed performance models and simulator infrastructure for computing systems accelerating AI training, and implement and evaluate hardware feature proposals.

• Collaborate across the company to guide the direction of machine learning at NVIDIA; spanning teams from hardware to software and research to production.

• Drive HW/SW co-design of NVIDIA’s full deep learning platform stack, from silicon to DL frameworks.

What we need to see:

• PhD in CS, EE or CSEE and 3+ years; or MS (or equivalent experience) and 6+ years of relevant work experience.

• Strong background in computer architecture, with a proven track record of architecting features in shipping high-performance processors.

• Background in artificial intelligence and large language models, in particular training algorithms and workloads.

• Experience analyzing and tuning application performance on state-of-the-art hardware.

• Experience with processor and system-level performance modelling, simulation, and evaluation before silicon exists.

• Programming skills in C++ and Python.

• Familiarity with GPU computing across all layers of the AI stack, from DL frameworks like PyTorch down to CUDA.