דרושים Senior Mixed Signal Design Verification Engineer ב-אנבידיה ב-Taiwan, Hsinchu
מצאו את ההתאמה המושלמת עבורכם עם אקספוינט! חפשו הזדמנויות עבודה בתור Senior Mixed Signal Design Verification Engineer ב-Taiwan, Hsinchu והצטרפו לרשת החברות המובילות בתעשיית ההייטק, כמו Nvidia. הירשמו עכשיו ומצאו את עבודת החלומות שלך עם אקספוינט!
Chip integration and netlist generation. Synthesis. RTL/netlist quality check. Formal Verification. Constraints creation and validation, timing budget. Work with ASIC team to analyze/resolve special timing issues. Cross-Team collaboration to implement...
Leading the development of groundbreaking microelectronics packaging for NVIDIA Networking Business Unit's future products. Collaborating with world-leading vendors to develop highly ambitious packaging solutions. Thriving in a dynamic and challenging...
Support all SLT NPI manufacturing and engineering activities from bring-up phase through mass production. Drive the development of automated testing systems and thermal solutions for System Level Testing. Perform NPI...
Be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra). Design state-of-the-art mixed-signal circuits in...
Bring new products and new technologies to high volume manufacturing. Drive continuous improvement in manufacturing yield, cycle time and product quality/reliability. Address manufacturing execution and quality issues through systemic solutions....
You will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra). Design state-of-the-art mixed-signal...
Perform physical layout for mixed-signal functions like PLL's, high speed memory I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools. Work with...
Chip integration and netlist generation. Synthesis. RTL/netlist quality check. Formal Verification. Constraints creation and validation, timing budget. Work with ASIC team to analyze/resolve special timing issues. Cross-Team collaboration to implement...
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