Design Verification Engineer - Pcie jobs at Nvidia in India, Bengaluru
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India
Bengaluru
106 jobs found
22.06.2024
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Nvidia Design Verification Engineer - PCIE India, Karnataka, Bengaluru
Responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models,...
Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional...
Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional...
Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional...
Set up scalable verification flows for an large IP that caters to multiple projects and variants. Improve continuous integration processes across multiple branches for various IP versions and projects. Represent...
Set up scalable verification flows for an large IP that caters to multiple projects and variants. Improve continuous integration processes across multiple branches for various IP versions and projects. Represent...
Be responsible for verifying the design, architecture and micro-architecture of IP/Cluster/SOC using advanced verification methodologies. Go through architecture/design specification and define the verification scope, come up with test plans, tests...
Responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models,...
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