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Senior Engineer Analog Layout jobs at Marvell
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28 jobs found
Today
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Marvell Senior Distinguished Engineer United States, California
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Block-level layout implementation and timing closure. Static Timing and Crosstalk analysis and timing closure. Design For Testing analysis and timing closure. Synthesis and Physical synthesis. Learn design rules of advanced...
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Today
M
Marvell Analog Mixed Signal Circuit Design Intern - PhD United States, California
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Execute specific tests and validation activities on available test plans for Board/Chip level siliconvalidation/characterization. Working with validation lead to execute and drive validation activities. Develop device controlling SW (knowledge of...
Yesterday
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Marvell Senior Staff Engineer Physical Design United States, California
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System verification of coherent DSP : Build and execute test plans for Marvell’s coherent and IMDD DSPs integrated into optical communication systems (OSA, EDFA, wavelength analyzers). Lab-based debugging : Investigate...
Yesterday
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Marvell Senior Staff Hardware Design Engineer United States, California
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and enhancement of firmware for embedded systems. Collaborate with HW and SW teams on overall design, system requirements, schematics, and hardware validation. Optimize firmware for performance, reliability, and power consumption....
Yesterday
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Marvell Senior Staff Physical Design Engineer United States, Idaho, Boise
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Act as the primary liaison for Trade Compliance team in Vietnam for export and import regulations and processes for products, software, and technology. Act as the liaison between various business...
27.06.2025
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Marvell Staff Analog Mixed Signal IC Design Engineer United States, California
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Drive functional verification of complex networking blocks using UVM/SystemVerilog. Develop and maintain advanced verification components and testbenches. Collaborate with cross-functional teams including architecture, design, firmware, and post-silicon. Contribute to methodology...
27.06.2025
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Marvell Principal Engineer Physical Design United States, California
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Challenging Work: Drive the characterization and validation of high-speed interfaces like PCIe, and Ethernet, focusing on electrical performance, compliance, and debugging. Innovation Opportunities: Collaborate with cross-functional teams to define test...
Description:Full job details
Block-level layout implementation and timing closure. Static Timing and Crosstalk analysis and timing closure. Design For Testing analysis and timing closure. Synthesis and Physical synthesis. Learn design rules of advanced...
These jobs might be a good fit
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