Technical Soc Director jobs at Intel in United States, Santa Clara
Intel Director- Business Development Foundry Services United States, California, Santa Clara
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About the GroupAbout the Role
Key Responsibilities
- Develop and execute sales plans, manage goals and budgets for CSP and HPC accounts.
- Build strategic customer relationships and identify new revenue opportunities through COT, ASIC, and Turnkey Services.
- Lead customer engagements from needs assessment to delivery, ensuring a seamless experience.
- Forecast demand and revenue, monitor market trends, and provide competitive insights.
- Create and execute account strategies, including mapping decision-makers and driving design wins.
- Respond to RFQs/RFIs, negotiate contracts and pricing, and align with internal stakeholders.
- Provide customer feedback to inform market forecasts and participate in marketing and demo events.
Required:
- Bachelor's degree with a broad technical/business background in semiconductor foundry.
- Proven success in ASIC/Turnkey sales and Salesforce proficiency.
- Strong understanding of process technologies, design enablement, and foundry pricing models.
Preferred:
- Bachelor's degree in Engineering or related field and MBA.
- Established relationships with Tier 1 HPC accounts (e.g., CSPs, networking, and storage companies).
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
Intel AI Systems Solutions Senior Director United States, California, Santa Clara
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Key Responsibilities
Partner with product management and engineering teams to interpret product definitions and translate them into actionable, system-level requirements.- Security Architecture
Define and document system-level security requirements, ensuring alignment with industry standards and best practices. - Power Control Design
Design and specify power control architectures, optimizing for efficiency and
reliability across various operating conditions. - Interconnect Architecture
Design robust interconnect frameworks to enable seamless communication and data flow across system components. - System Specification Development
Produce detailed architectural documentation, including block diagrams, interface definitions, and functional descriptions. - Technical Leadership
Lead architectural reviews and provide expert guidance to development teams throughout the product lifecycle. - Technology Evaluation
Assess emerging technologies and recommend solutions to enhance system performance, security, and energy efficiency. - Risk Management
Participate in system-level risk assessments and contribute to mitigation strategies. - Mentorship
Mentor junior engineers and architects, fostering a culture of innovation and technical excellence.
Minimum Qualifications
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related field with 12+ years of experience
- 5+ years of experience in AI, machine learning, next-generation technology development, and system architecture.
- Proven track record as a System Architect or in a similar leadership role, with successful delivery of architectural specifications and technology solutions.
- Extensive experience leading engineering teams, set strategic goals, drive execution, and deliver measurable outcomes.
Preferred Qualifications
- Strong capability in developing long-term technical strategies and guiding scalable AI and system architecture development.
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
Intel Director-Design Verification United States, California, Santa Clara
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Responsibilities
- Strategic Leadership: Develop and champion the organization’s silicon verification and validation roadmap, aligning with product requirements, business objectives and industry trends
- Team Management: Lead, mentor and grow a high performing team of verification, modeling and validation engineers. Foster a culture of excellence, innovation and continuous improvement
- Verification Methodology: Define, implement and improve methodologies, tools and flows, e.g SystemC, UVM, Formal Verification, Simulation Acceleration. Develop solutions thatspan from IP,subsystems, SOCs to rack-scale systems.
- Validation Strategy: Develop a post-silicon validation strategy, including bring-up, characterization and system-level validation toensure product meetskey performance, power and functional specifications.
- Cross-functional Collaboration: Partner closely with silicon architecture, design, DFT, physical design and software teams, to ensure seamless and timely development
- Quality & Risk Management: Establish and monitor key quality metrics. Proactively identify and mitigate technicalrisk through thedevelopment process
- Resource Management: Manage budgeting, resources and project timelines across all verification and validation activities
- Technical Expertise: Act as the domain authority for verification and validation challenges, driving technical decisions and problem-solving
Additional Skills
- Leadership Skills: Exceptional leadership, communication and interpersonal skills. Ability to influence stakeholders at all levels and drive alignment across multiple organizations.
- Problem Solving: Strong analytical and problem solving skillswith a keenattention to detail
Minimum qualifications
- Bachelor’s degree in Electrical Engineering, Computer Engineering or a related field with 12+ years of experience .
- 8+ years of progressive experience in silicon verification and validation
- 5+ years of experience in leadership roles, building and managing teams, coupled with a trackrecord in developingand delivering IP and Silicon products, from definition to deployment.
- 5+ years of experience with pre-silicon modeling and design verification, including developing architecture exploration tools, test planning, testbench development (SystemC, SystemVerilog, UVM), coverage analysis, debug
- Proven track record of architecting and executing modeling and verification plans for complex CPUs,GPUs, SOCs orother high-performance complex IPs and subsystems.
Preferred Qualifications
- Deep Modeling, Verification and Validation Roots:
- Expertise in verification methodologies, including formal verification, hybrid models, low power and simulation acceleration through emulation or FPGA prototyping
- Experience in silicon validation, from initial lab bring-up andboot, thorough softwarestabilization to power and performance tuning
- Silicon Lifecycle Responsibilities: Demonstrated experience interacting with and understandingchallenges of adjacentfields such as:
- Architecture: Experience influencing specificationdevelopment through developinghigh level simulation models and factoring in verification and testability perspectives
- Design: A strong understanding of microarchitecture, RTL design & tradeoffsalong with simulationand front-end tools.
- Design for Test : A solid grasp of DFT concepts, including JTAG, scan, MBIST and ATPG. Experience in collaborating with DFT team in per-silicon verification
- Physical Design : An appreciation of physical design process and flow (synthesis, P&R, power estimation, timing closure) and its impact on the architecture and design choices
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
These jobs might be a good fit
Intel Technical SoC Director United States, California, Santa Clara
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About the CTO AI Group
Intel’s CTO AI Group is at the forefront of Intel’s AI strategy. We shapethe strategy, systems, software, and silicon to move AI from potential to performance. Our team reaches across the company to drive AI forward – joining an agile, innovation-first culture with Intel’s massive scale to deliver leading-edgebreakthroughs andsolve real-world AI challenges.not just advancing AI —engineering it.
and drive cross-functionalteams. This role spans logic design, verification,and physical design, contributingthe development of IPs, sub-systems,SoCs. The ideal candidate will be passionate about engineering excellence, team development, and delivering high-quality silicon solutions.
Key Responsibilities:
Leadership & Management:
SoCengineeringdesignteams across multiple silicon design domains.
Track and reportdevelopment schedule,plans,progressand issues.
Foster a culture of accountability, continuous improvement, and highproductivity.
Design Oversight & Quality Assurance:
Conduct design reviews to ensure alignment withperformance and powertargets, in addition toSoC guidelines.
Review design health metrics and highlight potentialissues.Work with theappropriate leadertofix and follow-up on the proper design changes.
Oversee verification testplan andresultsto ensure proper planning and progress.
physical designprogress and results, especiallyon the timingside.
Drive corrective actions and ensure adherence to silicon quality standards.
with third party IP providers to ensuretheir IP deliveries match ourstandardand schedules.
Improvement:
Continuously enhance silicon development processes and architecture definitions.
Collaborate across IP and SoC teams to ensure cohesive and efficient design execution.
Additional Skills:
Excellent leadership, communication, and organizational skills.
Ability to drive cross-functional collaboration and strategic execution.
Qualifications:
BS in Electrical Engineering or Computer Science or related field with 10+ years of experience
8+ years of experience in leading silicon design teams across multiple functional areas.
Strong understanding of silicon development lifecycle and quality standards.
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
$204,500.00-$288,710.00This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
These jobs might be a good fit
Intel Senior Director- AI Fabric Networking United States, California, Santa Clara
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About the Role
Senior Director of Engineering, AI Fabric and Networking
Minimum Qualifications
- Master of Science in Electrical/Computer Engineering or related field with 8+ years of experience
- 15+ years of silicon engineering experience.
Experience in networking, high performance AI and HPC silicon development. - Led silicon engineering teams in multiple disciplines across various companies.
Preferred Qualifications
- Experience in development and deployment of high performance on-chip fabric solutions in production silicon, and their associated PPA(power/performance/area)trade-offs.
- Solid understanding of Ethernet and AMBA protocols.
- Good understanding of various architectures for AI silicon.
- Expertise in chiplet-based multi-die (2.5D, 3D) silicon engineering including yield, performance, power and thermal trade-offs. Familiar with die-die connectivity protocols such as UCIe, HBI, BoW, UALink etc as well as rack scale connectivity solutions.
- Knowledgeable in multi-die packaging technologies and chiplet test strategies.
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
These jobs might be a good fit
Intel SoC ML Architect United States, California, Santa Clara
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About the CTO AI Group
the strategybreakthroughs, andsolve real-world AI challenges.not just advancing AI —engineering it.
ngineers with SoC and ML experience to be part of aour next-generation AI accelerator. This role is pivotal in shaping the architectural foundation of our AI SoCs, driving innovation, and ensuring performance excellence across, memory, and communication subsystems.
Key Responsibilities:
ML Workload Analisys:Define and deconstruct keyAIworkloads
L KernelsDevelopment:Create and test custom MLkernelsusingtheappropriatemetricstovalidatethe architecture andfunctionalityfor differentML models.
Architectural Test Development:Developandvalidatearchitectural tests fordifferent aspectsof the SoCthat are scalable across different
Modeling & Performance Analysis:Develop andmaintainfunctionalmodels and performance analysis tools tovalidatefunctionality andoptimizesystem performance
Author comprehensive documentation including architecture specifications, programming guides, and best practice manuals.
Work closely with software, systems, and SoC implementation teams to ensure architectural alignment with product requirements and delivery goals.
Additional Skills
Excellent written and oral communication skills
Minimum Qualifications:
- BS with 6+ years of experience
- 4+ years of experience in AI and SoC background and practical experience
Preferred Qualifications
- Familiarity with modeling techniques (functional and performance)
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
These jobs might be a good fit
Intel Senior Director -AI SoC United States, California, Santa Clara
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About the CTO AI Group
We are seeking a visionary and technically adept leader to head the SoC Architecture team for our next-generation AI accelerator. This role is pivotal in shaping the architectural foundation of our AI SoCs, driving innovation, and ensuring performance excellence across compute, memory, and communication subsystems.
Key Responsibilities:
- Architectural Definition:Design scalable high-level and low-level micro-architectures for AI accelerator SoCs, encompassing compute engines, memory hierarchies, and interconnects.
- Hardware-Software Interface:Define robust hardware/software interaction models to support efficient programming and communication paradigms.
- Modeling & Performance Analysis:Develop and maintain architectural models and performance analysis tools to validate functionality and optimize system performance.
- Documentation:Author comprehensive documentation including architecture specifications, programming guides, and best practice manuals.
- Cross-Functional Collaboration:Work closely with software, systems, and SoC implementation teams to ensure architectural alignment with product requirements and delivery goals.
- Silicon Validation:Lead post-silicon correlation efforts to ensure performance targets are achieved and validated against architectural models.
- Team Leadership:Build, mentor, and scale a high-performing architecture team capable of delivering cutting-edge SoC designs on an annual cadence.
Additional Skills
- Excellent written and oral communication skills
- Leadership experience managing a small team of engineers and scientists
Minimum Qualifications:
- BS in electrical engineering or computer science or related field with 12+ years of experience
- 6+ years of experience in SoC architecture and background in AI
Preferred Qualifications
- Familiarity with modeling techniques (functional and performance)
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
These jobs might be a good fit
Share
About the GroupAbout the Role
Key Responsibilities
- Develop and execute sales plans, manage goals and budgets for CSP and HPC accounts.
- Build strategic customer relationships and identify new revenue opportunities through COT, ASIC, and Turnkey Services.
- Lead customer engagements from needs assessment to delivery, ensuring a seamless experience.
- Forecast demand and revenue, monitor market trends, and provide competitive insights.
- Create and execute account strategies, including mapping decision-makers and driving design wins.
- Respond to RFQs/RFIs, negotiate contracts and pricing, and align with internal stakeholders.
- Provide customer feedback to inform market forecasts and participate in marketing and demo events.
Required:
- Bachelor's degree with a broad technical/business background in semiconductor foundry.
- Proven success in ASIC/Turnkey sales and Salesforce proficiency.
- Strong understanding of process technologies, design enablement, and foundry pricing models.
Preferred:
- Bachelor's degree in Engineering or related field and MBA.
- Established relationships with Tier 1 HPC accounts (e.g., CSPs, networking, and storage companies).
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
