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Senior Cpu Subsystem Design Engineer jobs at Intel in United States, San Jose

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United States
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San Jose
9 jobs found
16.09.2024
I

Intel Senior CPU Subsystem Design Engineer United States, California, San Jose

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Description:
Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete...
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31.08.2024
I

Intel CPU Design Engineering Manager United States, California, San Jose

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Description:
Leads and manages CPU silicon design teams within one or more areas of functional development including logic design, verification, circuit design, and/or physical design for a CPU. Manages the engineering...
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28.08.2024
I

Intel SoC Logic Design Engineer United States, California, San Jose

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Description:
Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design. Integrates logic of IP blocks and subsystems into a full chip SoC or discrete component...
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29.08.2024
I

Intel FPGA Soft IP Design Verification Lead Engineer United States, California, San Jose

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Description:
Create comprehensive verification and validation plan based on IP/FPGA architecture specifications and carry out all the IP validation tasks. The plan encompasses functional, system level and hardware verification and validation...
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22.06.2024
I

Intel Senior EDA Software Engineer United States, California, San Jose

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Description:
Design, develop, troubleshoot, or debug software programs. Design data structures and algorithms, analyze software issues, and deliver top quality production software which exceeds customer expectations. Experience with runtime and memory...
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22.06.2024
I

Intel Global Business Services Senior Director United States, California, San Jose

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Description:
Collaborate with CEO and CEO Staff to define and drive the Stand-Up roadmap and program, ensuring that all stakeholders are informed and engaged. Develop and execute detailed Stand-Up plans, ensuring...
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28.08.2024
I

Intel Lead Timing Engineer United States, California, San Jose

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Description:
Perform timing analysis and optimization, generate and verify timing constraints, and fix timing violations at the chip/block level for SoCs. Conduct timing rollups, design for functionality, and develop performance and...
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Find your dream job in the high tech industry with Expoint. With our platform you can easily search for Senior Cpu Subsystem Design Engineer opportunities at Intel in United States, San Jose. Whether you're seeking a new challenge or looking to work with a specific organization in a specific role, Expoint makes it easy to find your perfect job match. Connect with top companies in your desired area and advance your career in the high tech field. Sign up today and take the next step in your career journey with Expoint.