Dft Engineer jobs at Intel in United States, Austin

Job Responsibilities

• Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications.
• Build scalable UVM-based test benches and define robust functional coverage models.
• Run system-level simulations to uncover design bugs and ensure functional integrity.
• Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolve test failures.
• Collaborate closely with CPU architects and RTL designers to verify complex architectural and microarchitectural features.
• Document verification strategies and lead technical reviews with design and architecture teams.
• Maintain and enhance existing verification infrastructure and methodologies.
• Contribute to the definition and refinement of CPU architecture and microarchitecture features.

Verification Planning & Strategy

• Develop comprehensive verification plans for CPU subsystems including cores, caches, memory controllers, and interconnects.
• Define coverage metrics and verification closure criteria.
• Collaborate with design teams to understand architectural specifications and implementation details.

Test Development & Execution

• Create directed and random test scenarios using SystemVerilog, UVM, and proprietary verification methodologies.
• Develop and maintain testbench infrastructure and verification IP.
• Debug complex functional and timing issues across multiple abstraction levels.
• Execute regression testing and analyze coverage reports.

Methodology & Tools

• Utilize industry-standard EDA tools.
• Implement constrained random verification environments.
• Develop and enhance verification automation scripts and flows.

Qualifications:

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor's degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 3+ years of experience.
• Experience developing SystemVerilog in UVM-based test-benches for reusable and scalable verification environments.
• Experience in scripting language (i.e. Python or Perl).
• Experience in C++.
• Experience implementingvalidation strategies based on architectural and design feature changes.

Preferred Qualifications

• Post Graduate degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 2+ years of industry experience.
• Solid understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
• Experience with Synopsys simulators.
• Experience with agile development methodologies.

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Functional Verification Excellence:

• Perform comprehensive functional verification of CPU logic to ensure designs meet rigorous specification requirements

• Develop detailed IP verification plans, sophisticated test benches, and robust verification environments to ensure complete coverage aligned with CPU microarchitecture specifications

Design Validation and Analysis:

• Execute verification plans and define system simulation models to verify design integrity, analyze power and timing characteristics, and uncover potential issues

• Replicate, root cause, and debug complex issues in thepre-siliconenvironment with precision and efficiency

Problem-Solving and Innovation:

• Identify and implement corrective measures to resolve failing tests and optimize verification processes

• Find creative solutions to complex verification challenges and drive continuous improvement

Cross-Functional Collaboration:

• Collaborate closely with CPU architects, RTL developers, and physical design teams to enhance verification of sophisticated architectural and microarchitectural features

• Work together to achieve ambitious functional, performance, and power goals

Technical Leadership:

• Document comprehensive test plans and lead technical reviews with design and architecture teams

• Maintain and enhance existing functional verification infrastructure and methodology

• Actively participate in defining architecture and microarchitecture features of next-generation CPUs

Qualifications:

Requirements listed can be obtained through a combination of industry-relevant job experience, internship experiences, and/orschoolwork/classes/research.

Minimum Qualifications:

• Bachelors in Computer Engineering, Electrical Engineering, or STEM-related field plus 4 years of relevant work experience or Master's degree in Computer Engineering, Electrical Engineering, or STEM-related field plus 2 years of relevant work experience

• 4+ years of work experience in one or more of the following areas:

  • Computer architecture knowledge, including specific areas of technical ownership/expertise relevant to CPUs

  • Validation environment development in C++, Verilog, System Verilog UVM/OVM

  • Programming experience in at least one language: Perl, Python, etc.

Preferred Qualifications:

• Experience withIntel Architecture ISA (Industry Standard Architecture) and system architecture, x86 assembly language

• Experience insoftware validation, including microcode and firmware

• Experience in post-silicon debug and analysis

• Intel or industry experience in micro-architecture, design, or verification of CPU cores

• Experience with hardware modeling languages such as Verilog, VHDL, or System Verilog and industry-standard logic simulation tools

• Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, and root cause analysis

• Assembly language programming, code generation, or other low-level software experience

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

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Microcode Development

• Design and implement microcode for complex instruction sets (x86 or proprietary architectures).
• Analyzing existing developed code, understanding and gathering new requirements, developing new algorithms or changes required, documenting for review and communication, creating and negotiating a development plan, writing the code, and debugging that code for functionality and performance requirements.
• Interacting and communicating with Architecture, Logic design, and Validation teams to achieve their coding goals.
• Supporting this code through tape-in and future steppings, either through patching or code rewrites.
• Being a member of the Microcode team, candidate will also be reviewing others' code and helping to improve group productivity and accuracy.

Architecture & Design

• Defining and developing innovative Architecture and Microarchitecture for Intel's next generation E-core Microprocessor.
• Collaborate with CPU architects to understand instruction set requirements and performance targets.
• Analyze instruction execution flows and optimize microcode for performance, power, and area efficiency.
• Design microcode control structures and sequencing logic.
• Participate in microarchitecture definition and specification reviews.

Verification & Testing

• Develop comprehensive test plans and verification strategies for microcode functionality.
• Create and execute microcode test cases using simulation environments.
• Debug microcode issues using advanced debugging tools and methodologies.
• Collaborate with validation teams to ensure proper microcode coverage in silicon testing.

Optimization & Performance

• Profile and analyze microcode performance using performance monitoring tools.
• Identify and resolve performance bottlenecks in instruction execution paths.
• Optimize microcode for specific workloads and benchmark requirements.
• Implement power management features within microcode constraints.

Qualifications:

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying topcandidates.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering or in a STEM related field of study.
• 5+ years of experience in CPU microcode development or processor design.
• 2+ years' experience with firmware development in C or C++.
• 1+ years' experience or education in Computer Architecture and/or Micro Architecture techniques.
• 1+ years' experience with logic design using Verilog and debug using industry standard tools.

Preferred Qualifications

• Post Graduate degree in Computer Science, Electrical Engineering, Computer Engineering or in a STEM related field of study.
• Experience simulator development using C++.
• Experience in logic design using Verilog and debug using industry standard tools.
• Experience with CPUarchitecture/assembly(i.e. Intel x86, AMD, ARM Cortex, etc.).

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Job Description:

As a Senior Principal Engineer, you will architect and develop embedded software that directly interfaces with hardware components, including microcode, IP-specific firmware, FPGAs, and DSPs. You will play a critical role in defining the firmware architecture, partitioning functionality between hardware and software, and driving co-validation strategies. This role requires deep technical expertise, strategic vision, and the ability to influence cross-functional teams across silicon, platform, and software domains.

Key Responsibilities:

• Firmware Architecture & Development
  • Design and implement embedded firmware with direct hardware interaction.
  • Define and partition features and algorithms between firmware and hardware for optimal performance, power, and scalability.
• Silicon & Platform Collaboration
  • Collaborate with silicon architects to define hardware requirements and influence architectural decisions.
  • Drive co-validation strategies across hardware and firmware to ensure seamless integration and functionality.
• Innovation & Pathfinding
  • Lead pathfinding efforts to explore emerging technologies and architectures.
  • Provide technical recommendations that shape future silicon and platform designs.
• Methodology & Process Improvement
  • Develop and refine methodologies, models, and tools to enhance firmware development and validation efficiency.
  • Champion best practices in embedded systems design and continuous improvement.
• Technical Leadership & Mentorship
  • Act as a domain expert and thought leader across the organization and industry.
  • Mentor and develop technical talent, fostering a culture of innovation and excellence.
  • Align organizational goals with technical strategy and drive execution from concept to product delivery.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 10+ years as firmware architect/lead for either a data center product or technology

Preferred Qualifications:

• Technical mastery in at least 1-2 technical areas of a typical data center products
• Experience with defining (new) interfaces for multiple FW ingredients and microcontrollers

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Who You Are

Responsibilities include but are not limited to:

• Designs, develops, and builds custom digital circuits for a CPU, including memory and caches.

• Designs floorplans, performs circuit design, schematic entry, simulation for CPU blocks, and verify functionality to optimize custom circuit for CPU power, performance, area, timing, and yield goals.

• Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.

• Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and CPU design issues.

• Optimizes performance, power, and area, reduces leakage of CPU circuits, and drives characterization of individual memory instances and memory compilers.

• Works with CPU architecture and layout teams to design circuits for best functionality, robustness, and electrical capabilities.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Master's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree with 3+ years of relevant experience -OR- PhD in Electrical Engineering and/or Computer Engineering or any STEM related degree with 2+ years of relevant experience

• 2+ years of work experience in the following areas:

  • Complementary MOS (CMOS) circuits design. Digital logic and optimization.

  • Circuit design trade-off for power, performance and area.

  • Very Large-Scale Integration (VLSI).

  • Low power implementation techniques.

  • Memory design experience.

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Power/Performance/Areaconstraints
Your responsibilities are as follows but not limited to:

• Designs, develops, and builds custom digital circuits for a CPU, including memory and caches.

• Designs floorplans, performs circuit design, schematic entry, simulation for CPU blocks, and verifies functionality to optimize custom circuit for CPU power, performance, area, timing, and yield goals.

• Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.

• Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and CPU design issues.

• Optimizes performance, power, and area, reduce leakage of CPU circuits, and drives characterization of individual memory instances and memory compilers.

• Works with CPU architecture and layout teams to design circuit for best functionality, robustness, and electrical capabilities.

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications

• Master's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree with 4+ years of experience in a high-tech company -OR- PhD in electrical engineering and/or computer engineering or any STEM related degree with 2+ years of experience in a high-tech company.

Preferred Qualifications

• Experience in Complementary MOS (CMOS) circuits design

• Experience in Digital logic and optimizations. Circuit design trade-off for power, performance and area

• Experience in Very Large-Scale Integration (VLSI)

• Experience in Low power implementation techniques

• Experience in Memory design experience

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

Who You Are

This role is in the Silicon Engineering Group as a Power Analysis and Optimization Engineer. Your responsibilities will include, but not limited to:

• Working cross-functionally with design and architecture teams to define targets and convergence methodology.

• Identifying opportunities for power optimization in existing design, and new power saving features.

• Defining power optimization solutions and driving optimizations that advance the state of art in power and efficiency.

• Designing, developing, and executing power plans for the CPU.

• Conducting feature and workload analysis from power standpoint and driving to close any

• gaps between observed behavior and targets on CPUs in development.

• Providing recommendations for future architecture.

• Developing and enhancing innovative flows for power analysis.

• Ensuring CPUs are optimized for power.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• The candidate must have a bachelor's degree in electrical/computer engineering, and/or computer science with 4+ years of experience -OR- Master's degree in electrical/computer engineering and/or computer science with 3+ years of experience -OR- a PhD in electrical/computer engineering and/or computer science

• At least 4 years of experience in dynamic and leakage power estimation and reduction atarchitecture/RTL/blocksynthesis and circuit design level.

Preferred Qualifications

• Master's degree in electrical/computer engineering and/or computer science with 3+ years of experience; OR a PhD in electrical/computer engineering and/or computer science with 2+ years of experience in the following:

  • Proficiency with industry-standard power estimation tools.

  • Automation skills in a scripting language.

  • Broad understanding of the overall CPU architecture.

  • Chip/CPU level understanding required on power consumption, power estimation and low power design methods.

Experienced HireShift 1 (United States of America)US, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.