Pre-si Functional Validation Hardware Platform Fpga/emulation jobs at Intel in India, Bengaluru

Key Responsibilities

• DevelopSystemVerilog/UVM-basedtestbenches for IP, subsystem, or SoC-level verification.
• Create and maintain verification plans, test cases, and coverage models.
• Implement and integrate scoreboards, monitors, checkers, assertions, and transactors for functional correctness.
• Work with Verification IP (VIP) for industry-standard protocols (AMBA, UCIe, PCIe, DDR, Ethernet, etc.) and integrate them into testbenches.
• Build reusable constrained-random and directed test scenarios.
• Debug failures, perform root cause analysis, and work closely with design and architecture teams.
• Analyze functional coverage, code coverage, and assertion coverage to ensure verification completeness.
• Participate in design/verification reviews and contribute to methodology improvements.
• Automate regression runs and maintain CI verification flows (Jenkins, Git, etc. if applicable).

Required Skills & Qualifications:

• Bachelor’s/Master’s inElectrical/Electronics/ComputerEngineering or related field with 8+ years of experience.
• Strong hands-on experience with SystemVerilog and UVM methodology.
• Proven experience in transactor modeling and VIPintegration/customization.
• Good understanding of digital design fundamentals (RTL, FSMs, buses, etc.).
• Familiarity with coverage-drivenverification andconstraint random test generation.
• Proficiency with industry-standard simulators and/or emulators (Synopsys VCS/Zebu, Cadence Xcelium/Palladium, Mentor Questa/Veloce, etc.).
• Debugging skills using waveforms and verification tools.
• Exposure to SVA (SystemVerilog Assertions) and functional coverage techniques.
• Experience withC/C++/Python fortestbench integration or automation.
• Hands-on work with protocol VIPs (AXI, AHB, APB, UCIe, PCIe, DDR, Ethernet, USB, etc.).
• Strong communication and teamwork skills.
• Experience in applying AI tools forverification/validationis a plus

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure highquality integration of the GPU block.
Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:
• BS EE/CS/CE
• System Verilog and UVM experience
• Fundamentals of computer architecturePreferred Qualifications:
• Masters with 3-5 years experience
• Coverage and assertion coding
• RTL design experience, CDC Experience, timing Closure
• Experience with simulation based RTL verification flows and tools
• Formal verification experience
• Experience with static checks, morein to designing experience.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

• The Client Development Group Bangalore, India is looking for a highly motivated SOC Pre-Si Verification Lead to join the compute die frontend DV team for the next generation of Client SOC.
• ResponsibilitiesOwn or lead verification of complex flows at the SOC, subsystem, or IP levelsLearn about the design and interact with partner teams to define verification strategies and test plans.
• Develop verification environments and run and debug simulations to drive quality.
• Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals.
• Innovate to improve verification efficiency through methodologies or tools Coach and mentor team in your areas of expertise.
• Demonstrate core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity and Inclusion.
• Plan the verification of complex design IP/SS/SoC interacting with the architecture and design engineers to identify verification test scenarios.
• Facilitate interactions with cross functional engineering organizations in supporting Project execution.
• Project planning and scheduling of activities of local team and present and report progress on a regular basis.
• Develop strategies, provide guidance and support team in addressing failure events.Formal : Good to have hands-on experience with formal verification .

Qualifications:

• 7+ years of experience in design verification with a proven track record of delivering complex CPU or SoC IP's/SS.
• Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in SV-UVM.
• Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
• Desirable
• Knowledge in SoC high-speed IO protocols, Fabric-NOC, MemSS, Graphics, Multimedia, Coherency cluster integration and System level flows verification.
• Hands-on experience with formal verification.
• Experience of working on x86 arch based High performing/Low Power SoCs.
• Scripting language such as Python or Perl.

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

We are seeking highly motivated, energetic, team-oriented engineer with 4-8 years of relevant experience, willing to take the challenge of delivering IP, Subsystem and SoC Pre-Silicon verification of the latest set of cutting-edge products in Ethernet Product Group in Intel.

In this position, you will participate and lead the verification of IP, Sub-systems and SoC. You will focus on executing pre-Silicon validation plans as per the IP/product release schedule and deliverables, and carry out debug, report failures, report potential failures and help with root-causing the failures. You will be required to create/review verification test plans, drive/participate in discussions across various disciplines to get a clear understanding of requirements, develop the architecture and design of the verification environment in UVM for pre-silicon RTL verification, develops/run/debug tests in System Verilog, mentor's other engineers in using the verification infrastructure and creating test benches. You may work on verification of block/ss/SoC level testing, participate in functional coverage, code coverage reviews and implement feedback. You should also be able to supportpost-silicon/platform

Qualifications:

Minimum Qualifications:B. Tech/M.Tech in Electrical, Electronics/CS streams.

Relevant Experience:3 to 8 Years.

High Proficiency in UVM-ability to architect complex testbenches, verification infrastructure, debugging and issue resolution. AXI, AHB, APB, ACE, AXI Stream protocol knowledge Fundamentals of A-profile Cores, AND/OR Networking Protocols such as PCIe, Ethernet, RDMA, NVME or Experience on Networking flows, AND/OR experience in DDR will be extremely preferred

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.
Qualifications:

• Bachelor's/Master's in Hardware Engineering /Electronics Engineering /Computer Engineering or Computer Science with minimum 6 years to 10 years (Domain Lead position) of related work experience.
• Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below
• Must have [in any one or more domains]
• Deep understanding in one or more protocols from PCIe Express, USB3, DP, Bare metal
• Expertise hands on with programming languages C, C++, Python & Expert understanding Data Structures.
• Good To have Firmware development & validation experience
• Good to have Type C, Thunderbolt [TBT3/ USB4 and USB5] knowledge.
• Excellent written and oral communications and experience working in a cross functional team environment are essential.
• Good Team Player.
• Processes strong problem solving, analytical and debug skills.

Added advantage

• Good working knowledge in C++/Python SW programming for content development and scripting.
• Knowledge of IA/ARM core and system level Power Management architecture who familiar in PMC feature, Gate/Chip level power management transition state & etc.
• Understanding of System Reset related Validation expertise is a plus.
• Solid understanding of the Validation and Debug flows of a complex CPU Silicon
• Knowledge on Validation/ Debug Flows and overall SOC Architecture.
• Pre-silicon Design / Validation knowledge is a value added.

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.BE/Btech/MTech with 12plus years of experience
Experienced HireShift 1 (India)India, BangaloreXeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.

Job Description:

• Bluetooth System Validation Engineer - Debugs software products through the use of systematic tests to develop, apply, and maintain quality standards for company products. Develops, modifies, and executes software test plans. Analyzes and writes test standards and procedures.
• Maintains documentation of test results to assist in debugging and modification of software. Analyzes test results to ensure correct functionality, determine root causes of failures and recommends corrective action.
• Consults with development engineers in resolution of problems. Provides feedback in preparation of technical appraisals of programming languages, systems, and computation software.

Qualifications:

Qualifications:

• Engineering degree in Electronics/Computer Science/Electrical from a reputed college
• 3+ years of work experience in a related field.
• Hands-on experience in Bluetooth Profile/Stack verification along with PTS
• Domain expert in Bluetooth/LE core (HCI and below layers)
• Experience with test automation and scripting (Python, Shell, or similar)
• Knowledge of networking concepts (TCP/IP, DNS, DHCP, etc.)
• Familiarity with different operating systems (Linux, Windows, macOS)
• Experience with network protocol analyzers (e.g., Ellisys, Wireshark)
• Exposure in WLAN Coex/OEM/IOP tests with Bluetooth

Key Responsibilities:

• Executes Bluetooth validation and testing on hardware and software products, including routers, access points, and client devices.
• Execute various Bluetooth performance and stress tests.
• Identify, reproduce, and report software and hardware issues related to Bluetooth performance.
• Develop and maintain test plans and procedures for validating Bluetooth functionality and interoperability.
• Collaborate with cross-functional teams (hardware, firmware, software) to troubleshoot and resolve technical issues.
• Analyze and interpret test results, creating detailed bug reports and documentation.
• Assist in the development of automated test scripts and tools to improve test efficiency.
• Stay up-to-date with the latest Bluetooth standards and incorporate them into testing processes.
• Strong analytical skills to troubleshoot and identify issues in complex systems.

Soft skills:

• 1. Ability to work independently and collaborate effectively within a cross-functional team.
• 2. Good written and verbal communication skills.
• 3. Quick learning of new technologies
• 4. Stakeholder management

Experienced HireShift 1 (India)India, Bangalore

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.