Jobs at Arm in Canada, Toronto

As a creative Security and Embedded Processor Design Engineer, you will be part of a team that will define and realize the Hardware Security IP and Subsystem. We will develop the design specifications, design hardware IP, and partner with the verification team to build test plans, support verification debug, and achieve functional, power, and performance sign off.

Our key responsibilities include writing micro-architecture specifications, developing the RTL, fixing bugs, and running design exploration and structural checks. In addition to Hardware IP development, you are going to contribute to developing and enhancing the design and methodologies shared by the team. You will guide and support members of the team as needed to enable the successful completion of project activities, plus balance other opportunities such as working with Project Management on activities, plans, and schedules.

Preferred candidates will have completed either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and experience working in design of complex compute subsystems or SoCs. You will need:

• Solid understanding of digital hardware design EDA methodologies and Verilog HDL.
• Design and verification experience in Security Hardware, Embedded Processor Systems, Applied Cryptography, Secure Boot, and Key Management.
• Proven experience in complex SoC architecture and development including multi-clock domain designs, AXI/AHB protocols, multi-power domains, and reset architectures.
• Experience with Perl, Python, tcl, or other scripting language
• Experience with ARM-based designs and/or ARM System Architectures
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e
• Synthesis and timing analysis
• Static design checks, including CDC, RDC, X-Propagation, Linting
• Power management techniques

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

As a creative Security and Embedded Processor Verification Engineer, you will be part of a team that will define and realize the Hardware Security IP and Subsystem. We will develop the test plans, testbenches, verification models, and test strategies. We will partner with the design team to functional, power, and performance sign off and comprehensive coverage.

Our key responsibilities include will include crafting test plans, developing UVM, SystemVerilog/Verilog, and C testbenches and tests, and debugging of test failures and issues. In addition to Hardware IP verification, you are going to contribute to development and enhancement of the design and verification methodologies shared by the team. You will guide and support members of the team as needed to enable the successful completion of project activities, plus balance other opportunities such as working with Project Management on activities, plans, and schedules.

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering (or similar field) over 10 years of experience working in design or verification of sophisticated compute subsystems or SoCs, you will need:

• Solid understanding of digital hardware Verilog HDL and Verification strategies including, SystemVerilog UVM, C, Formal, and Hardware/Firmware co-verification.
• Verification experience in Security Hardware, Embedded Processor Systems, Applied Cryptography, Secure Boot, and Key Management.
• Proven experience in complex SoC architecture and development including multi-clock domain designs, AXI/AHB protocols, multi-power domains, and reset architectures.
• Experience with Perl, Python, TCL, or other scripting language.
• Experience with ARM-based designs and/or ARM System Architectures.
• Experience verifying SoC projects or systems including embedded microprocessors.
• Low-level programming experience including C and Assembler. Experience with firmware debug and tarmac logging.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

• Partner and customer focus
• Collaboration and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

Responsibilities

As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for subsystems.

Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks. You are going to contribute to developing and enhancing the design methodologies used by the team where they will guide and support other members of the team as needed to enable the successful completion of project activities plus balance other opportunities such as working with Project Management on activities, plans, and schedules

Required Skills & Experience:

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and experience working in design of complex compute subsystems or SoCs, you will need:

• Strong knowledge of digital hardware design and Verilog HDL.
• A detailed understanding and experience of the current design techniques for complex SoC development.
• Experience creating design specifications
• Good knowledge of logic development using Verilog
• Experience with Perl, Python or other scripting language
  

"Nice to Have" Skills and Experience:

• Experience with ARM-based designs and/or ARM System Architectures
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e
• Experience leading small teams or projects
• Experience or knowledge in the following areas
• Synthesis and timing analysis
• Static design checks, including CDC, RDC, X-Propagation, Linting
• Power management techniques
• PCIe subsystems for large SoCs and server applications

In Return:

• Partner and customer focus
  Collaboration and communication
  Creativity and innovation
  Team and personal development
  Impact and influence
  Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

• As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing logic for our innovative high-performance compute and AI solutions.
• You will work as part of the design team to understand and review the SoC architecture and develop the design specifications which meet leading complex power/performance goals. Your key responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
• You will also work closely with the verification team to review test plans and help debug design issues and with the performance/power analysis teams to evaluate and improve SoC performance/power.
• As part of the design team you will contribute to developing and enhancing the design methodologies used by the team.
• You will mentor and support other members of the team to enable the successful completion of project activities.
• You will balance other opportunities such as working with Project Management on plans and schedules

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and 10+ years experience working in design of complex compute subsystems or SoCs, you will need:

• Experience in digital hardware design for complex systems using Verilog HDL.
• Experience with power and clock domain crossing and with static design checks like linting, CDC/RDC, X-propagation
• Exposure to all stages of design: initial concept, specification, implementation, power and performance analysis, power optimization, testing, documentation and support
• Experience or knowledge in synthesis, timing constraints, power management techniques
• Experience collaborating with the verification team on design quality closure
• Experience with Perl, Python or other scripting language
• Leadership, mentoring or coaching experience

• Experience with ARM-based designs and/or ARM System Architectures
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e
• Experience with UPF, IP-XACT
• Experience leading teams or projects
• Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
• Understanding of DFT topics: RTL testability, scan insertion, OCC

• As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL.
• You will work with the project team to understand and review the architecture and design specifications, and to build a functional verification strategy.
• Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues.
• You will also contribute to developing and improving the verification methodologies used by the team.
• In addition, you'll work closely with other teams on the design microarchitecture, verification methodologies, system performance, etc.
• You will guide and support other members of the team as needed to enable the successful completion of project activities.
• You will balance other opportunities such as working with Project Management on activities, plans, and schedule as well as guide and support junior members of the team.

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering (or similar field) over 5+ years of experience working in design or verification of sophisticated compute subsystems or SoCs, you will need:

• Solid understanding of digital hardware design and Verilog HDL.
• A detailed understanding and experience of the current verification strategies required for sophisticated SoC development, including software-based techniques
• Experience verifying subsystems for PCIe/CXL, DDRx/LPDDRx, HBM
• Good knowledge of test plan creation and tracking
• Experience verifying RTL for SoC projects
• Low-level programming experience including C and Assembler

• Experience with Arm-based designs and/or ARM System Architectures
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e
• Experience or knowledge in the following areas
• Formal verification techniques
• Clock domain crossing verification
• Experience with Perl, Python or other scripting language
• Power aware verification
• Porting peripheral driver software
• Development and deployment of complex Arm SoCs on multiple Emulation platforms as well as direct hands-on test bench development.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

• Partner and customer focus
• Collaboration and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

• As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing logic for our innovative high-performance compute and AI solutions.
• You will work as part of the design team to understand and review the SoC architecture and develop the design specifications which meet leading complex power/performance goals. Your key responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
• You will also work closely with the verification team to review test plans and help debug design issues and with the performance/power analysis teams to evaluate and improve SoC performance/power.
• As part of the design team you will contribute to developing and enhancing the design methodologies used by the team.
• You will mentor and support other members of the team to enable the successful completion of project activities.
• You will balance other opportunities such as working with Project Management on plans and schedules

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and 10+ years experience working in design of complex compute subsystems or SoCs, you will need:

• Experience in digital hardware design for complex systems using Verilog HDL.
• Experience with power and clock domain crossing and with static design checks like linting, CDC/RDC, X-propagation
• Exposure to all stages of design: initial concept, specification, implementation, power and performance analysis, power optimization, testing, documentation and support
• Experience or knowledge in synthesis, timing constraints, power management techniques
• Experience collaborating with the verification team on design quality closure
• Experience with Perl, Python or other scripting language
• Leadership, mentoring or coaching experience

• Experience with ARM-based designs and/or ARM System Architectures
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e
• Experience with UPF, IP-XACT
• Experience leading teams or projects
• Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
• Understanding of DFT topics: RTL testability, scan insertion, OCC

The Power Architecture and Attainment Lead role responsible for leading the delivery of SOC execution to meet product specific critical metrics. This work includes power budgeting, use-case analysis, estimation, and optimization for high-volume, sophisticated, SoC platforms on groundbreaking technology nodes across multiple market segments including IoT, AI/ML, compute, automotive, and server.

We are seeking strong technical leadership, with ability to develop accurate project plans involving multiple teams.

• Lead SoC power optimization for high-volume platforms, ensuring efficiency and performance across IoT, AI/ML, compute, automotive, and server markets.
• Expertise in RTL and Netlist based power analysis flows with good understanding of SoC physical design flows and simulation/emulation flows.
• Knowledge of ASIC design dependencies on power efficiency including technology node, mixed Vt design, standard cell and memory library selection, voltage and power domain partitioning.
• Proven experience driving multiple projects and supporting junior engineers.
• Appreciation of software use-cases, benchmarks, and workloads and how they interact with hardware low power features like clock and power gating, voltage/frequency scaling, memory/logic retention.
• Excellent presentation, interpersonal and communication skills. Able to present technical content inside and outside of Arm.

• Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PowerArtist, PrimePower, Redhawk, etc)
• Experience running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc)
• Python for automation and modeling.
• SoC use-case power budget decomposition to IP power budget.
• Experience with correlation between pre and post silicon power.

You will join a highly focused group to create, learn, define and lead.