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Soc Dram Memory Subsystem Validation Engineering Program Manager jobs at Apple in United States, Cupertino
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Cupertino
462 jobs found
03.07.2024
A
Apple SoC DRAM Memory Subsystem Validation Engineering Program Man... United States, California, Cupertino
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BS + 10 years of relevant experience. Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering. Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR...
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27.06.2024
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Apple SoC DRAM Memory Subsystem Validation Engineering Program Man... United States, California, Cupertino
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BS + 10 years of relevant experience. Validated SOC/Memory Chip Design, Validation, and Architecture, DRAM Test/Product Engineering experience. Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and...
11.06.2024
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Apple SoC Display Subsystem Validation Engineering Program Manager United States, California, Cupertino
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Prior SoC pre-/post-silicon or platform level validation experience. Technical Program Management/Engineering Management experience. Experience with SoC debug and architecture. Self-motivated and dedicated with proven creative and critical thinking capabilities. Phenomenal...
05.06.2024
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Apple SoC Memory Subsystem Validation Engineering Program Manager United States, California, Cupertino
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- Validated experience in SOC/VLSI/Memory Chip Design, Validation, and Architecture. - Confirmed technical program management or multi-functional management experience. - Experience working in a high-energy multi-disciplined engineering environment, strong at...
13.06.2024
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Apple SoC Silicon Debug Engineering Program Manager United States, California, Cupertino
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Proven track record in SOC / VLSI Chip Design, DRAM, Product Engineering. Technical program management / vendor management experience. Experience in silicon validation or qualification of ASICs. Experience with ARM...
12.06.2024
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Apple SoC Memory Performance Engineer Platform Architecture United States, California, Cupertino
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Solid knowledge of cache management and memory controller for DRAM technologies. Prior experience on writing a cache and memory simulator using C++ is a big plus. Excellent C/C++/scripting coding, debug,...
05.07.2024
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Apple SoC HW/SW Thermal & Power Control Engineering Program Manage... United States, California, Cupertino
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BS + 10 years of relevant experience. Proven experience with platform HW/SW integration, including debug and validation. Technical Program Management or Engineering Management experience. Technical knowledge of Power Management and...
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Description:Full job details
BS + 10 years of relevant experience. Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering. Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR...
These jobs might be a good fit
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