Formal Verification Engineer jobs at Apple in United States, Austin
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United States
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Austin
330 jobs found
12.06.2024
A
Apple Formal Verification Engineer United States, Texas, Austin
Interest in learning and becoming an expert in SoC/CPU/GPU/Cellular designs, VLSI, and digital logic design and verification techniques. Detail oriented mindset and desire to overcome challenges is required. - Formal...
Expert in SoC, CPU, GPU, and/or Cellular designs, as well as VLSI and digital logic design and verification techniques, or expert in formal tools and methodology and their application in...
- Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy. - Knowledge of SystemVerilog, digital simulation and debug....
- Knowledge of computer architecture and digital design fundamentals. - Knowledge of Verilog or SystemVerilog, digital simulation and debug. - Experience with Python, Perl, or similar scripting language. - Ability...
Deep knowledge of SystemVerilog and UVM. Deep knowledge in developing scalable and portable test-benches. Proven experience with verification methodologies and tools such as simulators, waveform viewers. Build and run automation,...
Expertise with Verilog. Expertise with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi. Experience with Perl, Shell scripting, Makefiles, TCL. Experience with low-level programming of complex computer...
Experience with continuous integration systems, automated build systems, and regression systems. Experience with Python and associated libraries (e.g. React, jQuery, D3). Experience with MySQL, including schema design and performance optimization....
Interest in learning and becoming an expert in SoC/CPU/GPU/Cellular designs, VLSI, and digital logic design and verification techniques. Detail oriented mindset and desire to overcome challenges is required. - Formal...
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