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Experienced Soc Physical Design Sta / Timing Engineer F jobs at Apple in Germany, Munich
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Munich
127 jobs found
17.07.2024
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Apple Experienced SoC Physical Design STA / Timing Engineer F Germany, Bavaria, Munich
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Bachelors's or Master's Degree in a technical field is required. Detailed knowledge of the ASIC design timing closure flow and methodology. Proficient in STA and methodologies for timing closure, and...
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01.06.2024
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Apple Experienced SoC Physical Design STA / Timing Engineer F Germany, Bavaria, Munich
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Detailed knowledge of the ASIC design timing closure flow and methodology. Proficient in STA and methodologies for timing closure, and have a good understanding of noise, cross-talk, and OCV effects,...
06.06.2024
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Apple Experienced SoC Physical Design STA / Timing Engineer Germany, Bavaria, Munich
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Description:Full job details
Detailed knowledge of the ASIC design timing closure flow and methodology. Proficient in STA and methodologies for timing closure, and have a good understanding of noise, cross-talk, and OCV effects,...
18.07.2024
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Apple Early career - SoC Physical Design STA / Timing Engineer F Germany, Bavaria, Munich
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Bachelors's or Master's Degree in a technical field is required. General knowledge of the ASIC design timing closure flow and methodology. Understanding of STA and methodologies for timing closure, and...
05.06.2024
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Apple SOC Physical Design Engineer F Germany, Bavaria, Munich
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We will be counting on your expertise and years of hands on experience with one of the Place & Route ('PnR') tools available today (Synopsys / Cadence), and having understanding...
09.07.2024
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Apple Experienced AMS Physical Design Engineer F Germany, Bavaria, Munich
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Knowledge hand on experience Floor-planning, and Place & Route, Physical verification, timing closure, power/functional verification. Ability to fluently speak and write in English. BSc in EE. The ideal candidate will...
13.06.2024
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Apple Experienced SoC DfT Engineer F Germany, Bavaria, Munich
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We are counting on your expertise and knowledge about industrial standards and practices in DfT, including ATPG (debug, compressed patterns), JTAG/1500 debug, MBIST and trade-offs between test quality and test...
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Description:Full job details
Bachelors's or Master's Degree in a technical field is required. Detailed knowledge of the ASIC design timing closure flow and methodology. Proficient in STA and methodologies for timing closure, and...
These jobs might be a good fit
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