- Understand details of High Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power spec, multi-processor systems, DDR, PCIe , Memory Controller Subsystems, USB, PLL, power up, Secured Boot schemes.- Create coverage driven verification plans from specifications, review and refine to achieve coverage targets.- Architect UVM based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches and test suites to SOC level. - Achieve targeted coverage, work with design, architecture, SW, FW and external IP delivery teams to efficiently integrate and verify overall SOC design.- Work closely with DV methodology architects to improve verification flow.