Qualcomm Power Management Design engineer 

United States, California, San Diego 

313566095

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Skills/Experience

• 5 to 8 years of strong experience in digital front end design for ASICs

• Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains

• Familiar with UPF and power domain crossing

• Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI

• Experience in low power design methodology and clock domain crossing designs

• Experience in Spyglass Lint/CDC checks and waiver creation

• Experience in formal verification with Cadence LEC

• Understanding of full RTL to GDS flow to interact with DFT and PD teams

• Expertise in Perl, TCL language

• Expertise in post-Si debug is a plus

• Good documentation skills

• Should possess good communication skills to ensure effective interaction with Engineering Management and team members.

• Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision

Responsibilities

• Digital design and development (RTL) working in close collaboration with Multi-site leads across US and India

• Developing the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoC

• Design and implement defined tasks independently.

• Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed.

• Analyze reports/waivers or run various tools : Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$134,500.00 - $201,500.00