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Design Manager jobs in United States, Oregon, Beaverton
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Job title (1)
United States
Oregon
Beaverton
176 jobs found
28.07.2025
A
Apple SoC Physical Design Engineer STA/Timing United States, Oregon, Beaverton
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Minimum BS and 3+ years of relevant industry experience. Experience with large design STA and/or Timing Closure. Programming skills with Perl and TCL. Hands-on experience in STA. Familiar with important...
Description:
In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC using state of the art process technology.
- Minimum BS and 3+ years of relevant industry experience.
- Experience with large design STA and/or Timing Closure.
- Programming skills with Perl and TCL.
- Hands-on experience in STA.
- Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies.
- Proficient in STA and methodologies for timing closure and have a fundamental understanding of noise, crosstalk, and OCV effects, among others.
- Familiar with circuit modeling, including SPICE models, and worst-case corner selection.
- Familiar with ECO techniques and implementation.
- Good communicator who can accurately describe issues and follow them through to completion.
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20.07.2025
A
Apple SRAM Circuit Design Engineer United States, Oregon, Beaverton
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3+ years of professional experience in data modeling, pipeline development, and software engineering. Proficiency in dimensional modeling and data warehouse architecture. Hands-on experience with both relational and NoSQL database systems....
Description:
Develop highly scalable data pipelines to ingest and process data from multiple source systems, leveraging Apache Airflow for workflow orchestration, scheduling, and monitoring.Architect generic, reusable solutions that enforce to data warehousing best practices while addressing complex business requirements. Analyze and optimize existing systems, providing improvements and ongoing support as needed. Uphold the highest standards of data integrity and software quality, ensuring reliable and accurate outputs.
- 3+ years of professional experience in data modeling, pipeline development, and software engineering
- Proficiency in dimensional modeling and data warehouse architecture
- Hands-on experience with both relational and NoSQL database systems
- Solid understanding of Linux environments with scripting capabilities in Python and SQL
- Detailed understanding of OLTP and OLAP systems
- Experience with big data technologies (Kafka, Spark, Flink, Hive, etc.)
- Practical knowledge of cloud data services (AWS, Ali Cloud, or equivalent platforms)
- Demonstrated ability to analyze business requirements and deliver data-driven solutions
- Excellent written and verbal communication skills with strong problem-solving abilities
- A Bachelor’s or equivalent experience or Master’s degree in Computer Science, Computer Engineering, or a related technical field—or equivalent practical experience.
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07.07.2025
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Bank Of America Financial Center Assistant Manager Bilingual Spanish Preferr... United States, Oregon, Beaverton
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Manages client traffic, engaging and appropriately routing clients, and fosters client retention. Manages business results through formalized management routines and coaching. Creates a world class client experience environment. Manages market-level...
Description:
This job is responsible for managing a financial center (FC) in collaboration with senior team members, supporting the operational excellence of the FC and ensuring that all aspects run effectively and cohesively. Key responsibilities include overseeing of functions such as the smooth and efficient functioning of the teller line, day-to-day policy and procedure adherence, and improvement of financial center performance. Job expectations include ensuring that directives are implemented and taking up leadership responsibility for the financial center when teammates are absent.
Responsibilities:
- Manages client traffic, engaging and appropriately routing clients, and fosters client retention
- Manages business results through formalized management routines and coaching
- Creates a world class client experience environment
- Manages market-level initiatives prescribed by market leaders
- Drives operational excellence by engaging employees on business strategy
- Manages organizational priorities and effective execution
Skills:
- Coaching
- Customer Service Management
- Customer and Client Focus
- Performance Management
- Talent Development
- Business Operations Management
- Recruiting
- Result Orientation
- Risk Management
- Sales Performance Management
- Inclusive Leadership
- Leadership Development
- Prioritization
- Problem Solving
- Referral Management
High School Diploma / GED / Secondary School or equivalent
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29.06.2025
A
Apple DDR Design Engineer United States, Oregon, Beaverton
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BS degree in technical discipline with minimum 3 years of relevant experience. RTL design using Verilog or SystemVerilog, assertion writing. Design of state machines, data paths, arbitration and clock domain...
Description:
In this role, you will be responsible for the following:Performing concept studies and provide direction in terms of performance, gate count and power for various digital designs. Writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. Providing high-quality RTL description, including assertions, for the design. Formal tools and static checkers will be used to guarantee RTL quality. Supporting design verification to insure bug-free first silicon. Driving functional and code coverage as well as timing closure for your designs. Supporting silicon bring-up, performance and power characterization.
- BS degree in technical discipline with minimum 3 years of relevant experience.
- RTL design using Verilog or SystemVerilog, assertion writing
- Design of state machines, data paths, arbitration and clock domain crossing logic
- Logic synthesis, timing constraints
- Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL
- Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
- Prior experience in DDR PHY design and mixed-signal environment is a plus
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29.06.2025
A
Apple DDR Mixed Signal Circuit Design Engineer United States, Oregon, Beaverton
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BS degree in technical discipline with minimum 10 years of relevant experience. Proven understanding of all aspects of Analog/Mixed Signal Circuit Design of PHYs. TX, RX, Delay Locked Loops, Phase...
Description:
As an Analog/Mixed-Signal Circuit Design Engineer, you will be involved with all phases of high-performance PHY designs from architectural concept to delivery of our final GDS.
- BS degree in technical discipline with minimum 10 years of relevant experience.
- Proven understanding of all aspects of Analog/Mixed Signal Circuit Design of PHYs. TX, RX, Delay Locked Loops, Phase Interpolators, Delay Lines, Duty Cycle Correctors, reference generators, etc.
- Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able to collaborate with logic design team.
- Solid understanding of Circuit Verification tools (Simulators, Extraction, EMIR, Noise, SigEM, etc.).
- Generate block/chip level specifications.
- Perform block level verification to close the design by meeting performance, power and area specifications.
- Participate in establishing Design Methodologies to ensure correct, by construction designs.
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28.06.2025
A
Apple SoC Physical Design Engineer STA/Timing United States, Oregon, Beaverton
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Minimum Bachelor's degree. Experience with STA. Experience with noise, crosstalk, and/or OCV effects. Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Experience with STA...
Description:
In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SoC using state of the art process technology.
- Minimum Bachelor's degree.
- Experience with STA.
- Experience with noise, crosstalk, and/or OCV effects.
- Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies.
- Experience with STA and methodologies for timing closure.
- Familiar with circuit modeling, including SPICE models, and/pr worst-case corner selection.
- Good programming skills with Perl and TCL.
- Experience with large design STA and Timing Closure.
- Familiar with ECO techniques and implementation.
- Good communicator who can accurately describe issues and follow them through to completion.
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These jobs might be a good fit
28.06.2025
A
Apple Mixed-Signal IC Design Engineer United States, Oregon, Beaverton
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BS degree in technical discipline with minimum 10 years of relevant experience. Experience conceptualizing, evaluating, designing, and taking to production analog and mixed-signal circuits and sub-systems for sensing and measurement....
Description:
Participate in defining, designing, developing, and taking to production analog and mixed-signal circuits and sub-systems within Apple integrated circuit devices. Specify, design, implement, and verify analog and mixed-signal circuits and sub-systems, including transistor-level analog circuits, mixed-signal interfaces, and digital control and signal processing blocks. Develop and run high-level simulations to validate top-level integration. Engage with cross-functional analog, digital, DV, firmware, software, SoC architecture, technology, packaging, silicon validation, production test, manufacturing, and other teams to implement the new circuits and sub-systems and drive them into production. Define production and bench-top test-plans, analyze results, and drive DOEs. Create integration guides and user documents, and generally assist with challenges in successfully implementing the new circuits and sub-systems into complex SoCs.
- BS degree in technical discipline with minimum 10 years of relevant experience.
- Experience conceptualizing, evaluating, designing, and taking to production analog and mixed-signal circuits and sub-systems for sensing and measurement. Such experience within digital-intensive SOCs is especially preferred
- Expertise in techniques for high-precision circuit design in the presence of large device mismatch and high supply noise
- Deep knowledge of device physics as it applies to semiconductor devices and manufacturing technology
- Solid understanding of ADC/DAC architectures, performance metrics, design trade-offs, and criteria for deciding which ADC/DAC designs are suitable for different applications
- Solid understanding of and experience with building block circuits for measurement sub-systems such as band-gaps, CMOS bias generators, TIAs, op-amps, filters, switched-cap circuits, LDOs, ADCs, etc.
- Solid understanding of and experience with precision analog design techniques including feedback and compensation, chopping, dynamic element matching, frequency planning, trimming/calibration, and real-time adaptive algorithms. Experience applying AI/ML to optimizing such techniques is highly valued
- Strong verbal and written communications skills and the ability to distill key issues from complex technical situations
- Experience in working with product and production test engineers to develop and validate test plans, optimize production testing, and debug sources of low-DPPM parametric yield loss
- Experience in C / MATLAB / Verilog modeling
- Proficiency in Python programming
- Experience with AI/ML, especially in applying tools and technique to any/all aspects of analog/mixed-signal circuit design and productization
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These jobs might be a good fit
Share
Minimum BS and 3+ years of relevant industry experience. Experience with large design STA and/or Timing Closure. Programming skills with Perl and TCL. Hands-on experience in STA. Familiar with important...
Description:
In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC using state of the art process technology.
- Minimum BS and 3+ years of relevant industry experience.
- Experience with large design STA and/or Timing Closure.
- Programming skills with Perl and TCL.
- Hands-on experience in STA.
- Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies.
- Proficient in STA and methodologies for timing closure and have a fundamental understanding of noise, crosstalk, and OCV effects, among others.
- Familiar with circuit modeling, including SPICE models, and worst-case corner selection.
- Familiar with ECO techniques and implementation.
- Good communicator who can accurately describe issues and follow them through to completion.
Show more
These jobs might be a good fit
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