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DDR Sybsystem Validation Debug Engineer High Tech Jobs

831 found
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Intel

DDR Sybsystem Validation Debug Engineer

DDR Sybsystem Validation Debug Engineer

Israel, Haifa

05.12.2021
I
Intel

Software engineer development post-silicon debug validation ...

Software engineer development post-silicon debug validation ...

Israel, Haifa

05.12.2021
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Product Enabling/Debug Engineer

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05.12.2021
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Israel, Jerusalem

05.12.2021
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Validation Engineer

Israel, Haifa

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Intel

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I
Intel

System Validation Engineer

System Validation Engineer

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A
Amazon

Integration Validation Engineer

Integration Validation Engineer

Israel, Haifa

05.12.2021
I
Intel

System Validation engineer

System Validation engineer

Israel, Jerusalem

05.12.2021
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Intel

DDR Sybsystem Validation Debug Engineer

Israel, Haifa
Details

Come and make a MESS

Come join a team that is in the heart of making the exciting Intel CPU products work. You will drive the system to work at its top performance and you will also make it operate at its lowest possible power. You will make sure the CPU can use the system Memory with no errors or problems by providing the solutions that enable that. Your impact on Intel next generation of CPU will be significant.

Responsibilities:

A MESS Validation Engineer is responsible for planning and executing the of the Memory subsystem. The engineer works with all silicon and product related disciplines and is exposed to the system elements from the circuit level to the driver level, and all that is between them.


Bachelor's degree in Electrical/ Computer Engineering or Computer Science with good accomplishments

Exceptional interpersonal communication, relationship management, effective listening and influencing skills that result in strong working partnership capability.

Strong analytical and problem-solving skills

Advantage:

Chipset integrated circuit testing and high-volume manufacturing experience

Experience in: FPGA, Emulation/Prototyping, Pre Si or Post Si validation, Logic Design, Integration, Complex Debug

Knowledge in: Memory, Power management, SoC level protocols and flows, HW/SW integration.

Drivers or firmware development background


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