Asic Rtl Design Ddr - Staff Engineer jobs at Qualcomm in India, Bengaluru
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MTech/BTech in EE/CS with 8+ years of ASIC design experience. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Good understanding of DDR families (LP/PC)...
We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices.In this role, you will work with chip architects to conceive of the micro-architecture, and...
10+ years of experience in Design Verification of complex IPs. Hands-on experience and very good understanding of DDRPHY architecture, DFI protocol and Jedec standards for latest Gens. Ownership of DV...
Exposure to synthesis & STA. Low power and high speed design awareness. Knowledge on design flow, industry standard frond end tools flows ( lint, cdc, etc.). Knowledge of scripting and...
Exposure to synthesis & STA. Low power and high speed design awareness. Knowledge on design flow, industry standard frond end tools flows ( lint, cdc, etc.). Knowledge of scripting and...
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.3-5years of relevant ASIC design experience. Solid experience in digital front end design for ASICs. Expertise in RTL coding in Verilog/VHDL/SV...
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related...
MTech/BTech in EE/CS with 8+ years of ASIC design experience. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Good understanding of DDR families (LP/PC)...
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