National Channel Business Manager jobs at Palo Alto in United States, Phoenix

Being the cybersecurity partner of choice, protecting our digital way of life.

Your Impact

• Develop and execute business plans driving all aspects of the partner relationship to maximize growth opportunities and ensuring the partner is well-positioned to deliver successful customer implementations and recommendations.

• Extensive experience working with National Partners.

• Establish executive level relationships between Palo Alto Networks and National Partners.

• Knowledge of how the organization operates and the internal areas to work with to drive Palo Alto Networks specific programs to capture mindshare, build pipeline, and drive revenue.

• Proven history of developing and executing strategic national partner-specific business plans and marketing campaigns.

• Work well in a team environment to ensure partner and customer satisfaction.

• Design a compelling value proposition that inspires partners to promote our solutions.

• Create services based on our emerging and established technologies increasing revenue growth.

• Provide clear and consistent communication across the region with your dedicated partners to build strong partnerships throughout your assignment.

• Lead regular business performance and relationship reviews with senior management and various stakeholders.

• Build and maintain the activity of performance reports and activity dashboards.

Your Experience

• Bachelor’s Degree or equivalent, MBA a plus.

• 5+ years experience in Global Systems Integrator Business Management, Channel Management, or Business Development roles within the enterprise software ecosystem, network security industry and/or Cloud industry.

• Excellent instincts and shown ability to interface at a senior leadership to individual contributor level with ease.

• Excellent executive communication and presentation skills.

• Successful track record of exceeding performance objectives.

• Understanding of channel operating models.

• Knowledge of sales, marketing, and solution development.

• Demonstrate strong initiative and ability to think creatively with excellent presentation, written, and overall communication skills.

• Consistent track record of leading complex sales situations through negotiation and conflict resolution.

• Capable of performing in a virtual team environment.

• Negotiation and conflict resolution skills.

Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/commissioned roles) is expected to be between $189000 - $275000/YR. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found .

All your information will be kept confidential according to EEO guidelines.

This role may require travel to and from Palo Alto Networks, Inc. business meetings and events and requires reliable transportation to do so. If a hire chooses to drive in connection with company business, the hire for this role must maintain a valid driver’s license.

Being the cybersecurity partner of choice, protecting our digital way of life.

Your Career

As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug. You will work on diverse platforms including simulation, emulation, and silicon validation.

Your Impact

• Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, and emulation
• Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies
• Develop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers
• Define new tools and methodologies to continuously improve quality and velocity

Your Experience

• BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred
• Minimum 10 years experience in ASIC design verification
• Demonstrated success in taking ASIC products to mass production
• Experience in Networking required
• Expertise in SystemVerilog and UVM

Required strengths

• Defining test plans, including comprehensive adversarial testing
• Developing rich functional coverage models
• Creating powerful and scalable test benches
• Implementing sophisticated self-checking infrastructure with reference models and scoreboards
• Developing reusable constrained-random tests
• Debugging failures
• Closing coverage

Preferred experience

• Networking and cybersecurity
• Silicon validation - bringup, test, debug, and regression
• Creating models in Python and C/C++
• Writing driver code in C
• Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing
• Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status
• Strong leadership, collaboration, and communication skills

Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/commissioned roles) is expected to be between $145000/YR - $234500/YR. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found .

All your information will be kept confidential according to EEO guidelines.