Chip Design Architect jobs at Nvidia in Israel, Tel Aviv-yafo

with opportunities for growth, learning, and leadership.

Join one of the most desirable employers in the tech industry and help us build the next generation of GPU networking silicon.

What you’ll be doing:

• Drive chip-level integration for advanced GPU networking silicon projects.

• Collaborate with architecture, RTL design, verification, FV and physical design teams to ensure seamless integration and optimal performance.

• Develop and maintain integration flows, methodologies, and automation to improve efficiency and quality.

• Perform RTL synthesis, timing analysis, and support verification and post-silicon activities.

• Handle Clock Domain Crossing (CDC) checks and ensure robust design practices.

• Work closely with multiple teams across architecture, micro-architecture, backend, and firmware to deliver high-quality silicon.

• Contribute to state-of-the-art technologies delivering industry-leading throughput and ultra-low latency for GPU networking solutions.

What we need to see:

• B.Sc. in Electrical or Computer Engineering

• 5+ years of experience in chip design, integration, RTL design and/or verification

• Strong knowledge of Verilog /System Verilog and RTL design principles.

• Hands-on experience with CDC analysis, synthesis, and timing closure.

• Familiarity with EDA tools (Synopsys, Cadence, Mentor) and scripting languages (Python, TCL).

• Excellent communication skills and ability to work in a collaborative, fast-paced environment.

Ways to stand out from the crowd:

• Knowledge of network protocols, HPC, or distributed systems – an advantage.

What you'll be doing:

• Lead design of new networking applicationsto craft new networking applications that address sophisticated problems in groundbreaking ways.

• Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

• Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

• Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architects.

What we need to see:

• 5+ years of practical experience in firmware design and/or firmware architecture.

• A B.Sc or equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science with outstanding grades.

• Excellent verbal and written communication skills.

• Proven ability to work in a collaborative, team-oriented environment.

Ways to stand out from the crowd:

• Knowledge of Ethernet/IP technologies, cloud, or data-center technologies.

• Experience in programming computer networks.

• Strong understanding of system design principles.

What you'll be doing:

• Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

• Be exposed and work on a variety of exciting designs. Resolving complex timing and congestion problems.

• Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

• Taking part in flow development.

What we need to see:

• B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

• Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

• Deep understanding of all aspects of Physical construction and Integration.

• Knowledge in Physical Design Verification methodology LVS/DRC.

• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

• 2-3 years of relevant experience

• Great teammate.

What you’ll be doing:

• Work on NVIDIA current and next generation of Networking devices and GPU.

• Build and create Firmware Phy solutions for our new SerDes and physical linkup flow.

• Work closely with our costumer support team to build solutions for our costumers

• Work with the architecture, HW, and SW design teams

• Debug and screen HW/FW/SW issues

• Lead data-driven discussions about the product functionality and areas for improvement

• Define implement and maintain FW algorithm to control the Silicon

• Take an active part in silicon bring-up and SW development phases

What we need to see:

• B.Sc. or M.Sc. in Electrical or Computer Engineering

• 3+ years of relevant experience

• Proficient programming in C

• Experience working in Git.

• Debugging experience and ability to investigate and triage difficult problems in embedded FW

• Good communication skills and the ability to work with people across several countries

• Ability to work with interrupts and dynamic environment with good spirit.

• Excellent English verbal and written communication skills

Ways to stand out from the crowd:

• Proficient in Python

• Good understanding of SerDes operation

• Experience with developing the physical layer of communication protocols

• Knowledgeable of Hardware/Software Development Process

• Strong collaborative and interpersonal skills, with an ability to successfully guide and influence

What you'll be doing:

• Work in a combined design and verification team which develops some of the switch silicon core units.

• Build reference models, verify and simulate chip blocks/entities according to specifications.

• Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

What we need to see:

• 4+ years of experience in RTL design or RTL verification.

• Previous experience in networking - an advantage.

• B.Sc. in Electrical Engineering or Computer Engineering.

• A team player with good communication and interpersonal skills.

What You'll Be Doing:

• Work in a combined design and verification team which develops some of the switch silicon core units.

• Micro-architecture for RTL and simulation environment planning for units and modules.

• Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

• Build reference models, verify, and simulate chip blocks/entities according to specifications.

• RTL synthesis, timing, supporting verification, and silicon post TO activities.

• Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.

What We Need To See:

• B.Sc. in Electrical Engineering or Computer Engineering with high scores or equivalent experience.

• 1+ years of experience in RTL design and/or dynamic verification.

• Completion of programming and logic design courses.

• A great teammate with good communication and interpersonal skills.