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What you'll be doing:
Working with customers, partners, and IP vendors to understand SOC/IP solutions best suited for the target use cases and work with them to select and integrate appropriate IP/SOC solutions.
Work with Architects, Chip Leads, and Customers on SOC/IP design, development, timing closure, power analysis, methodology alignment, and program execution to ensure pre-silicon and post-silicon targets are met.
Integrating, evolving, and optimizing IP blocks across a range of products and use cases for
Working with teams throughout the company (Architects, RTL, PD, Circuit, SI, Thermal, SW, Platform, Operations, Marketing, etc...) on implementing cross-team solutions to achieve project targets.
Drive cross-team methodologies for external soft IP and PHY integration, Nvidia IP release to partner, RTL development and microarchitecture.
What we need to see:
B.S. or M.S. in Computer Engineering or Electrical Engineering (or equivalent experience)
9+ years of relevant work experience in RTL development focused on CPU
Proficiency in industry-standard RTL development and synthesis tools.
Experience developing high-speed digital blocks.
Experience debugging complex microarchitectural structures
Strong interpersonal, communication, and teamwork skills.
A drive to continuously learn and expand architectural breadth and depth.
Ability to evaluate microarchitectural options for tradeoffs across design, verification, and PD.
Experience interconnecting and analyzing complex microarchitectural structures and subsystems.
Ways to stand out from the crowd:
Cross-cultural work and study experience
Experience in ARM-based SOC definition and development
Background in partner and customer engagement for usecase/chip solution.
Experience in some of domains, SOC clock implementation, power structure insertion, DFT, synthesis, place and route and STA.
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What you'll be doing:
As a valued member of the team, you will be involved in the technical design and implementation of numerous features working in an agile environment. In this role you can expect to:
Create developer tools features for NVIDIA GPUs that enables developers to quickly iterate on optimizations to build fast graphics applications.
Write fast, effective, maintainable, reliable and well documented code.
Effectively estimate and prioritize tasks in order to build a realistic delivery schedule.
Provide peer reviews to other engineers including feedback on performance, scalability and correctness.
Drive technology discussions and provide valuable feedback about the architecture as a domain expert.
Document requirements and designs, and review documents with stakeholders.
Demonstrate growth in technical and non-technical abilities.
Meet with the QA Department to develop a test plan for new features.
What we need to see:
Pursuing BS or MS degree in one of the areas of Electrical Engineering, Computer Engineering, Computer Science.
Excellent C++ programming skills and ability to articulate key aspects of Object-Oriented Programming.
Proficient in at least one graphics programming API such as Direct3D, OpenGL and Vulkan.
Able to work effectively with a team of engineers in a fast paced and dynamic environment.
Excellent written and verbal communication skills.
Able to estimate effectively to ensure delivery of software on time.
Ways to stand out from the crowd:
Knowledge of 3D Graphics Algorithms and GPU Architectures.
Strong grasp of heterogeneous computing, multithreading and a deep understanding of streaming multiprocessors, warp scheduling etc...
Experience with GPU low-level performance tuning/optimization, including profiling and debugging.
Solid understanding of User Experience (UX) design, GUI development and the Qt framework is a huge plus.
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What you’ll be doing:
Design and Implement API tests for CUDA driver and library.
Automate CUDA tests, design test plan and enable them in automation testing infrastructure.
Triage test results, isolate test failures and improve test coverage.
What we need to see:
Can work 4 days a week for at least 1 year
Pursuing MS or PhD degree from a leading university in computer science.
Familiar with programming and debugging skills with C/C++ and Python.
Interested in test cases development, tests automation and failure analysis.
Experience using AI development tools to improve quality and productivity across the end-to-end QA workflow.
Good QA sense, knowledge and experience in software testing.
Ways to stand out from the crowd:
Strong English communication and collaboration skills.
Familiar with parallel programming, ideally CUDA C/C++, is a plus.
Background with Bullyseye, Gcov or other dev tool is a plus.
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NVIDIA SOC System-ASIC team is hiring a verification engineer. In this role, you will work closely with Arch, design and verification engineers to thoroughly verify some top-level related control units (like: Fuse/Floorsweep, Strap, Reset, Sysctrl) and some silicon measurement related units from unit-level to fullchip-level. Those units are important IPs used in both NVIDIA GPU and Tegra products.
What you’ll be doing:
Micro-architecture definition for System-level modules (Fuse, Strap, Floorsweep, In-silicon measurement, Reset, Sysctrl, etc...)
Unit-level and System-level verification for System-level modules.
Own some NVIDIA internal checks to guarantee the design quality.
What we need to see:
BS / MS or equivalent experience in electrical / computer engineering and related.
Above 5 years of ASIC design/verification experience.
Familiar with verification methodology, tools and flow.
Understand frontend ASIC design flow including RTL design, synthesis and timing analysis.
Excellent analytical and problem-solving skills.
Fluent English (both written and spoken) and excellent communication skills.
Good team work spirit, easy to cooperate with team members.
Ways to stand out from the crowd:
Broad knowledge with Video techniques, SOC architecture and Computer architecture is a big plus.
Strong programming skills in C/C++, SystemVerilog, Perl and Python is appreciated as a plus.
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What you’ll be doing:
Be responsible for running test cases to validate NVIDIA GPU Communications Libraries (NCCL, NVSHMEM, UCX, GDRCopy, GPUDirect RDMA etc).
Be responsible to automate test cases and maintain the automation scripts.
Collaborate with Developer, PM, marketing, and engineering teams on crafting test plan and implementing validation.
You will assist in the architecture, crafting and implementing of SWQA test frameworks.
Be responsible for code coverage improvement and code complexity optimization.
What we need to see:
BS or higher degree in CS/EE/CE or equivalent experience
5+ years of relevant experience
Seasoned software QA or software testing background; test infrastructure and strong analysis skills
Be proficient in scripting language (Python, Perl, bash)
Solid experience with AI development tools for test development and automation
Knowledge of basic networking concepts
UNIX/Linux experience is required
Experiences in C/C++ is required
Ability to work independently and leadership skillsas well as experience in using quality mindset to drive improvements
Proficient oral and written English
Ways to stand out from the crowd:
Experience with CUDA programming and NVIDIA GPUs
Knowledge of high-performance networks like InfiniBand, RoCE,etc
Experience with CSPs(AWS, Google Cloud, Oracle Cloud Infrastructure, Microsoft Azure), andHPC cluster,slurm, ansible, etc
Prior experience with virtualization technologies (KVM, HyperV, VMWARE, OpenStack, Docker, Kubernetes)
Experience with Deep Learning Frameworks such as PyTorch, TensorFlow, etc
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NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people.
What you'll be doing:Design and implement the DSL and the core compiler of tile-aware GPU programming model for emerging GPU architectures
Continuously innovate and iterate on the core architecture of the compiler to consistently optimize performance
Investigation of next-generation GPU architectures and provide solutions in the DSL and compiler stack
Performance analysis on emerging AI/LLM workloads and integrate with AI/ML frameworks
Masters or PhD or equivalent experience in relevant discipline (CE, CS&E, CS, AI)
4 + years of relevant work experience
Excellent C/C++ programming and software engineering skills, ACM background is a plus
Good fundamental knowledges on computer architecture
Strong ability in abstracting problems and the methodology in resolving problems
Strong compiler backgrounds including MLIR/TVM/Triton/LLVM is desired
Good knowledge of GPU architecture and fast kernel programming skills is a plus
Knowledge of LLM algorithms or a certain HPC domain is a plus
Knowledge of multi-GPU distributed communication is a plus
Excellent oral communication in English is a plus
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What you will be doing:
Design and implementfunctional/performancetests for CUDA products, like driver and library.
Automate CUDA tests, design test plans and integrate into automation testinginfrastructure.
Triage test results, root cause test failures or performance drops, and drive through bugs to fix.
Develop scripts/tools and optimize workflow to improve efficiency and productivity.
What we need to see:
MS or PhD degree from a leading university in computer science or a related field.
At least 3 years of relevant professional experience.
Excellent QA sense, knowledge, and experience in software testing.
Rich experience in test case development, tests automation and failure analysis.
Proficient programming and debugging skills in C/C++ and Python.
Comprehensive knowledge of Linux and Windows operating systems.
Experience in using AI development tools for test plans creation, test cases development and test cases automation.
Ways to stand out from the crowd:
Excellent English communication and collaboration skills.
Strong understanding of CUDA, HPC, Gcov, VectorCAST, Coverity.
These jobs might be a good fit

What you'll be doing:
Working with customers, partners, and IP vendors to understand SOC/IP solutions best suited for the target use cases and work with them to select and integrate appropriate IP/SOC solutions.
Work with Architects, Chip Leads, and Customers on SOC/IP design, development, timing closure, power analysis, methodology alignment, and program execution to ensure pre-silicon and post-silicon targets are met.
Integrating, evolving, and optimizing IP blocks across a range of products and use cases for
Working with teams throughout the company (Architects, RTL, PD, Circuit, SI, Thermal, SW, Platform, Operations, Marketing, etc...) on implementing cross-team solutions to achieve project targets.
Drive cross-team methodologies for external soft IP and PHY integration, Nvidia IP release to partner, RTL development and microarchitecture.
What we need to see:
B.S. or M.S. in Computer Engineering or Electrical Engineering (or equivalent experience)
9+ years of relevant work experience in RTL development focused on CPU
Proficiency in industry-standard RTL development and synthesis tools.
Experience developing high-speed digital blocks.
Experience debugging complex microarchitectural structures
Strong interpersonal, communication, and teamwork skills.
A drive to continuously learn and expand architectural breadth and depth.
Ability to evaluate microarchitectural options for tradeoffs across design, verification, and PD.
Experience interconnecting and analyzing complex microarchitectural structures and subsystems.
Ways to stand out from the crowd:
Cross-cultural work and study experience
Experience in ARM-based SOC definition and development
Background in partner and customer engagement for usecase/chip solution.
Experience in some of domains, SOC clock implementation, power structure insertion, DFT, synthesis, place and route and STA.
These jobs might be a good fit