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Physical Design Sta Technical Expert jobs at Mobileye in Israel, Haifa
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Israel
Haifa
8 jobs found
04.05.2025
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Mobileye Physical Design Expert Israel, Haifa District, Haifa
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Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...
Description:
What will your job look like:
- Hands-on physical design block owner from RTL to GDS with horizontal ownership.
- Floorplan exploration and collaboration with front-end and architecture teams.
- Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
- Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
- STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
- Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification
All you need is:
- BSc or MSc degree in Computer Engineering or Electrical Engineering.
- 8+ years experience in the Physical Design field.
- Experience with high speed interfaces (DDR/PCIE) - an advantage.
- Experience with advanced nodes (5nm and below) - an advantage.
- Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
- Building or maintaining implementation tools and flow - an advantage.
- Experience in scripting languages like Tcl/Python/Perl/TCSH.
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03.05.2025
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Mobileye Experienced Logic Design Engineer Israel, Haifa District, Haifa
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Design ownership on major blocks/clusters from definition to implementation phase. Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint. Design micro-architecture of custom blocks. BSc in...
Description:
What will your job look like:
- Design ownership on major blocks/clusters from definition to implementation phase.
- Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
- Design micro-architecture of custom blocks.
All you need is:
- BSc in Electrical engineering/Computer Engineering.
- Over 5 years of experience in Logic design.
- Experienced in all ASIC flow from definition to implementation.
- Experience in design for power- Advantage.
- Experience in High-speed I/Fs or algorithm blocks - Advantage.
- Knowledge in CDC and low power flow - Advantage
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03.05.2025
M
Mobileye IC Product Engineer Technical Lead Israel, Haifa District, Haifa
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Setup and maintenance of test, diagnosis, and yield analysis infrastructure using the Exensio data analytics platform. Enable end-to-end production traceability and effective yield monitoring and quality control across all stages...
Description:
What will your job look like:
- Setup and maintenance of test, diagnosis, and yield analysis infrastructure using the Exensio data analytics platform.
- Enable end-to-end production traceability and effective yield monitoring and quality control across all stages of production.
- Implement advanced flows for outlier detection, escape prevention and adaptive tests to maximize product quality. Interact with OSATs to define checkpoints for key quality metrics.
- Collaborate with Test Engineering (TE) teams to ensure test quality and recommend test limits for production lots and corner lots based on system specifications, yield, and Cpk targets.
- Drive yield improvement and test-time reduction activities based on Wafer Sort (WS), Final Test (FT) and System Level Test (SLT) production data.
- Analyze foundry Wafer Acceptance Test (WAT) data from development, corner lots, and qualification lots. Collaborate with wafer foundry to correlate WAT with WS test data to identify and resolve systematic yield issues.
- Drive volume ramp and mass production through volume data analytics. Manage yield excursions and material disposition in a timely manner.
All you need is:
- Setup and maintenance of test, diagnosis, and yield analysis infrastructure using the Exensio data analytics platform.
- Enable end-to-end production traceability and effective yield monitoring and quality control across all stages of production.
- Implement advanced flows for outlier detection, escape prevention and adaptive tests to maximize product quality. Interact with OSATs to define checkpoints for key quality metrics.
- Collaborate with Test Engineering (TE) teams to ensure test quality and recommend test limits for production lots and corner lots based on system specifications, yield, and Cpk targets.
- Drive yield improvement and test-time reduction activities based on Wafer Sort (WS), Final Test (FT) and System Level Test (SLT) production data.
- Analyze foundry Wafer Acceptance Test (WAT) data from development, corner lots, and qualification lots. Collaborate with wafer foundry to correlate WAT with WS test data to identify and resolve systematic yield issues.
- Drive volume ramp and mass production through volume data analytics. Manage yield excursions and material disposition in a timely manner.
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03.05.2025
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Mobileye Experienced SoC Design Engineer Israel, Haifa District, Haifa
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You'll be responsible of architecture of the DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more). Develop all the necessary HW / FW / SW for the different...
Description:
What will your job look like:
- You'll be responsible of architecture of the DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more)
- Develop all the necessary HW / FW / SW for the different modules
- Verify and Validate our design
- Debug and analyze coverage and yield loss
- As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts – as it required by the Automotive and Safety related products market (ISO26262).
All you need is:
- BSc/MSc in Electrical/Computer engineering
- Proven Experience in either SCAN or MBIST tools and flows
- At least 5 years of experience in the ASIC/SoC industry
- Proven skills in Perl / Python / TCL
- Knowledge of Hierarchical SCAN methodology
- Knowledge of Logic BIST (LBIST) and Test Point Insertion (TPI) flows
- Knowledge of TAP protocols IEEE 1149.1/1500/1687 (iJTAG)
- Knowledge in Automotive industry FuSa (Functional Safety)
- Knowledge of Synthesis flows
- DFT experience in both SCAN/MBIST - Advantage
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02.05.2025
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Mobileye SystemC Modeling Expert Israel, Haifa District, Haifa
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You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU . You will work on developing SystemC models that describe...
Description:
The position
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
- You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
- You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
- You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to Mobileye's needs.
- You will work closely with HW architects and SW/Algorithms developers .
All you need is:
- BSc in Computer-Science, Computer Engineering or Electrical Engineering.
- 5+ years of experience on SystemC Modeling -Must
- 5+ years of experience in embedded SW.
- knowledge in shell scripting and Python.
- Strong communication, co-working, and listening skills.
- Experience working with Synopsys tools as Power architect and Virtualizer – Advantage.
- Knowledge in assembly languages and hardware design aspects – Advantage.
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02.05.2025
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Mobileye Physical Design STA Technical Expert Israel, Haifa District, Haifa
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Leading FC timing activities & methodologies for brand New SoC, from definition to TO. Writing design constraints (SDC) for FC/IP/Block levels for all modes. Involved in chip architecture definition for...
Description:
What will your job look like:
- Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
- Writing design constraints (SDC) for FC/IP/Block levels for all modes.
- Involved in chip architecture definition for functional & DFT domains.
- Working in close collaboration with the front-end & architecture team.
- Working with engineers to identify and overcome roadblocks and obstacles.
- Defining AC timing from spec to implementation.
- Supporting complex clock structures.
All you need is:
- BSc/MSc in Electrical Engineering/Computer Science.
- STA Expert (Prime-Time/Signoff).
- 8 years of experience in VLSI backend (RTL2GDS).
- 5 years of experience in full chip STA on complex SoCs.
- Expert knowledge in timing closure & signoff methodologies.
- Experience with DFT architecture, Async timing concepts & verification.
- Experience in technically leading complex backend activities, preferably of complete SoC's.
- Expert knowledge of the entire backend design flow from RTL to TO. (Synthesis, FP, PnR , CTS , STA, EM/IR, Chip Integration, high-frequency designs).
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07.04.2025
M
Mobileye Technical Software Project Manager Israel, Haifa District, Haifa
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Set and track project management standards and procedures, oversight and governance, resource management, communication, and reporting. Lead process and technology improvements, define and deploy tools to help track the execution...
Description:
What will your job look like?
- Set and track project management standards and procedures, oversight and governance, resource management, communication, and reporting.
- Lead process and technology improvements, define and deploy tools to help track the execution and reflect the status.
- Coordinate the execution of project deliverables within schedule and quality delivery.
- The role is extremely interesting and involves tight interaction with Mobileye platform SW group leaders and project managers.
- The ideal candidate must be able to understand the department's needs and requirements, help in defining the department portfolio road map and reflect the progress.
All you need is:
- Relevant Bachelor's degree, preference for Scientific/Engineering
- At least 5 years of experience in technical project/program management.
- Strong technical background in software project management tools, standards, and processes.
- Experience in driving the product vision and the execution discussions.
- Knowledge in CI/CD processes - Advantage
- Excellent communication, interpersonal, and problem-solving skills and ability to interact at all levels.
- Fluent English and Hebrew
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Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...
Description:
What will your job look like:
- Hands-on physical design block owner from RTL to GDS with horizontal ownership.
- Floorplan exploration and collaboration with front-end and architecture teams.
- Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
- Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
- STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
- Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification
All you need is:
- BSc or MSc degree in Computer Engineering or Electrical Engineering.
- 8+ years experience in the Physical Design field.
- Experience with high speed interfaces (DDR/PCIE) - an advantage.
- Experience with advanced nodes (5nm and below) - an advantage.
- Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
- Building or maintaining implementation tools and flow - an advantage.
- Experience in scripting languages like Tcl/Python/Perl/TCSH.
Show more
These jobs might be a good fit
The Physical Design STA Technical Expert role in the Tech Industry in Mobileye in Israel, Haifa is an incredibly rewarding and exciting job for anyone passionate about technology. This position is responsible for developing and maintaining STA scripts for chip and SOC timing closure. We're looking for a creative and highly experienced individual who is passionate about cutting-edge technology.
This role plays an essential part in helping to ensure that the company is meeting the highest standards of timing closure. This individual will define standards and best practices when it comes to STA methodology and will actively monitor the STA process to ensure that it is consistently developing and improving. Additionally, this person will be responsible for identifying and investigating STA issues and suggesting ways to avoid such issues in the future.
This role involves working closely with various teams within Mobileye, such as IC Design, SOC, Verification, and Validation. This creates an exciting and stimulating work environment undirected by close collaboration with other teams.
The successful candidate will possess outstanding knowledge of the fundamentals of the STA process and some exposure to EDA tools such as Synopsys and Cadence. An understanding of the RTL-to-Gates flow in Cadence or Synopsys is also highly preferred. An understanding of the clock utility floorplan and the STA budgeting process is a bonus. Above all, we’re looking for someone with a passion for applying their technical expertise to improve the timing closure process.
This role offers a tremendous opportunity for personal and professional growth, and it’s ideal for an ambitious individual who wants to be part of something truly revolutionary. If you’re up to the challenge, apply for this position today and join the Mobileye team.