Micro Architect jobs at Intel in India, Bengaluru

Roles and Responsibilities include:

• Design and develop software features for AI frameworks—both hardware-agnostic and hardware-aware.
• Enhance and extend deep learning inference and training capabilities in the software stack.
• Analyze and architect state-of-the-art features across different frameworks and drive development across the full software stack.
• Identify optimization opportunities in the software stack to improve the performance of deep learning workloads.
• Participate in discussions with the open-source community, contribute to development, and upstream software enhancements.

• B.Tech or M.S./M.Tech in CS, ECE, or related fields with 6–12 years of overall experience.
• Proficient in Python-based complex software implementations; intermediate knowledge of advanced C++ (C++14/17) and parallel programming.
• In-depth, hands-on experience with frameworks such as PyTorch, vLLM, and SGLang.
• Experience with advanced inference-serving features such as disaggregated serving, quantization, speculative decoding, and constrained decoding.
• Strong understanding of LLMs
• Practical knowledge of deep learning models for image and video generation is desirable.
• Ability to debug complex issues in multi-layered software systems; understanding of software integration in large open-source frameworks.
• Strong understanding of computer architecture and HW-SW optimization techniques.
• Effective communication skills and experience working in cross-geo teams.
• Ability to perform performance analysis of code on both host and accelerators/GPUs using open-source and proprietary profilers.
• Understanding of the competitive landscape for technologies in this domain.

Preferred

• Experience developing and integrating CUTLASS or Triton-based kernels for deep learning.
• Knowledge of compiler algorithms for heterogeneous systems and fuser optimizations.

NES SOC Architecture team is looking for an outstanding engineer to work on definition of NEX SoC(s) for Intel Server, Client and IoT platforms. In this role, you will develop and drives end-to-end SoC architecture for highly optimized, modular, and scalable SoC, based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle. You will collaborate across disciplines to analyze workloads, identify opportunities for improvement, determine priorities, and balance trade-offs.

Responsibilities include:

• Determining functional requirements based on product goals, use cases, and workload analysis.
• Defining SoC architecture to meet product requirement and deliver architecture specifications.
• Evaluates feasibility trade-offs and explores and defines new approaches and novel architectures for SoC.
• Invents, conceptualizes, and specifies microarchitecture and architectural features for next-generation products to deliver optimized SoC for multiple segments from high performance computing to extreme low-power products.
  ​

A successful candidate will demonstrate.

• Broad knowledge of SoC architecture.
• Performance, power trade-off understanding.
• Deep expertise in domains such as reset, clock, coherency, debug, power management, performance evaluation
• Exceptional communication skills.
• Collaborates with design engineers, system engineers, verification engineers, structural design engineers to improve the overall design of SoC and overcome constraints.
• Work will include a combination of individual contribution and leveraging team participation through mentoring and leadership of technical initiatives.

Minimum Qualifications:

• Bachelor's degree or higher in Computer Science or Electronics Engineering, 15+ years relevant experience in Silicon development in Arch/Uarch, Modeling,Design includingmultiple project development life cycles with at least one as lead architect or lead u-architect.

In this role, you will develop and drives end-to-end SoC architecture for highly optimized, modular, and scalable SoC, based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle.

Your responsibilities will include, but are not limited to:

• Drives SoC functionality, connectivity, configuration, performance, timing, power, and area goals.
• Drives evaluation and integration of existing IP blocks into new SoCs as well as the specification of any gaskets or glue logic.
• Analysis of IP bandwidth, latency requirements and define SOC Coherent and Non-coherent interconnect.
• Performance modeling and Analysis

A successful candidate will demonstrate.

• Strong problem solving, debugging, multi-tasking, and brainstorming skills
• Deep expertise in one or more domain such as reset, clock, coherency, debug, power management, performance evaluation
• Ability to analyze the solution for various pros/cons
• Collaborates with design engineers, system engineers, verification engineers, structural design engineers to improve the overall design of SoC and overcome constraints

Minimum Qualifications:

• Bachelor's degree or higher in Electronics or Computer science Engineering, 10+ years relevant experience in Silicon development in Arch/Uarch/Design

The DCAI and Silicon Eng Team deliver leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.

• This role requires a unique blend of architectural expertise and hands-on RTL coding skills to bring cutting-edge designs to life.

• The ideal candidate will have a deep understanding of high speed IOs like PCIe/CXL/UCIe architecture, interconnect protocols and coherence mechanisms, coupled with a proven ability to implement these designs at the RTL level.

• Architect scalable memory coherency protocols and interconnect topologies to achieve high performance and low latency for data center and AI SoCs.

• Design and implement critical components of the memory fabric microarchitecture, including coherency controllers and interconnect blocks.

• Develop RTL code for core components of the memory fabric, ensuring optimal performance, area, and power trade-offs.

• Work closely with verification teams to create test plans and debug issues arising during pre-silicon validation.

• Collaborate with cross-functional teams (physical design, software, and firmware) to ensure seamless integration of memory fabric systems.

• Analyze system performance, conduct workload modeling, and optimize the architecture for target use cases.

• Mentor junior engineers and contribute to technical reviews and design documentation.

• Stay updated with emerging technologies and trends in PCIe/CXL/UCIe protocols, and AI/ML hardware.

• Strong problem-solving and debugging skills.

• Excellent communication and collaboration abilities.

• Ability to manage and prioritize multiple tasks effectively.

Must have a Bachelor's degree with 15+ year experience or Master's degree in Electronics and Computer Engineering with relevant experience of at least 10+ years

We're looking for a highly motivated, Pre-Silicon Verification Engineer who is responsible to ensure:
* CPU Core Group is looking for Pre-Silicon Verification Lead/Architect (Functional/Performance/Security
o Driving StrategicTool/Flow/Methodologies/QualityInitiatives from definition to Implementation and Deployment in Projects to reduce overall Cycle Time of Validation Project Cycle for PRQ Quality.
o Development of Complex Pre-Silicon Verification environments for simulation, development of Verification Components and coverage plans. Rigorously driving to improve Validation Plans to ensure Right First Time Success of our Products. Work directly with hardware architects, logic designers to influence overall SoC and system design. Has demonstrated past track record of technical leadership and has managerial experience.
* Plans, provides resources and drive activities in engineering function to meet schedules, standards, and cost.
* Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions.
* Provides guidance on employee development, performance, and productivity issues.
* Plans and schedules daily tasks, uses judgement on a variety of problems requiring deviation from standard practices.
* Technically guides test plan development, verification methodology, tracks deliverables to ensure timely execution with high quality and networks with peers locally and across sites for beating commitments.

Candidate must possess a master's degree in Electronics or Computer Engineering with at least 4 or more years of experience in related field or a Bachelor's Degree with at least 10 years of experience in Pre-Silicon Verification Environment.Preferred Qualifications:
* Experience with RTL design, Verilog and simulation, debug tools such as Verdi, System Verilog based verification techniques
* Familiarity with CPUarchitecture/ProcessorVerification - advantage
* Familiarity withFunctional/Performance/SecurityVerification - advantage
* Experience in Perl/Python and Linux OS
* Experience in development of integrated software and/or hardware environment - advantage
* Experience in working with SVTB UVM or Specman (e) - advantage
* Team player, passionate, energetic, motivated, and drive global activates.
* Candidate should demonstrate excellent Self-motivation, communication, strong problem solving and teamwork skills.

We're looking for a highly motivated, Pre-Silicon Verification Lead Engineer who will be responsible to :

• Define Verification architecture that is scalable across multi level verification for most advanced multi die SoCs
• Define domain level verification plan
• Develop VIPs, protocol checkers, scoreboards.
• Define coverage, assertion based verification methodologies.
• Work directly with hardware architects, logic designers to influence overall SoC and system design.
• Mentor and technically lead junior engineers.

• Candidate should have a Bachelors/ Masters in Electrical or Computer Science Engineering or related field with 15+ years of technical experience.
• Related technical experience should be in/with: Silicon Design and/orValidation/Verification.PreferredQualifications:� Experience in CPU/ GPU verification
• Experience with SV/ UVM Language
• Experience with Formal verification techniques is a plus
• Strong background in scripting - PERL/Python
• System hardware and software debug skills
• Understanding of software hardware co-validation techniques
• Solid understanding of system and processor architecture, advanced memory and IO technologies
• Candidate should demonstrate excellent Self-motivation, communication, strong problem solving, excellent in cross-site communication and teamwork skills.