Soc Logic Design Engineer Junior jobs at Intel in Canada, Vancouver

The Design Engineer:

• Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
• Participate in the development of Architecture and Microarchitecture specifications for the Logic components at the IP and/or the SoC level.
• Excellent problem-solving and interpersonal skills, as well is good written and verbal communication skills.
• Willingness to work cross-geo/site when needed to accomplish results.
• Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

What we need to see (Minimum Qualifications):
Bachelor's or Master’s degree in degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 1+ years' experience in Logic RTL Design Implementation and Debugging.

How to Stand Out (Preferred Qualifications):

• 1+ yrs. experience in Hardware Design Language (such as VHDL or Verilog).
• 1+ yrs. exp. In C/C++ programming
• 1+ years' experience with scripting languages
• Post graduate degree electrical engineering, computer engineering, computer science, math or in any STEM related field.
• Low power and UPF design experience (e.g., architecture, design, verification, etc.)
• Formal verification experience (assertion-based testing)
• Experience with UCIe, DDR, Ethernet, and/or PCIe/CXL protocols
• Experience with DFT (design for test)
• Experience implementing digital logic designs in FPGA systems or other emulation methods.
• Experience with adjacent areas of the SoC development process (e.g. synthesis, static timing analysis, formal equivalence checking, UVM Verification etc.)

Note: This position is primarily remote with periodic meetings in the Vancouver area.

Annual Salary Range for jobs which could be performed in Canada

The Design Engineer:

• Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
• Participate in the development of Architecture and Microarchitecture specifications for the Logic components at the IP and/or the SoC level.
• Excellent problem-solving and interpersonal skills, as well is good written and verbal communication skills.
• Willingness to work cross-geo/site when needed to accomplish results.
• Coaching and mentoring junior team members.
• Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

What we need to see (Minimum Qualifications):

• Bachelor's degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 4+ years of experience in Logic RTL Design Implementation.
• Master's degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 3+ years of experience in Logic RTL Design Implementation.

How to Stand Out (Preferred Qualifications):

• Experience in High-level Synthesis in addition to Verilog and SystemVerilog
• Experience In C/C++ programming
• Experience with scripting languages
• Post graduate degree electrical engineering, computer engineering, computer science, math or in any STEM related field.
• Low power uArchitecture and UPF experience (e.g., architecture, design, verification, etc.)
• Formal verification experience (assertion-based testing)
• Experience with UCIE, DDR, Ethernet, and/or PCIe/CXL protocols
• Experience with DFT (design for test)
• Experience implementing digital logic designs in FPGA systems or other emulation methods.
• Experience with adjacent areas of the SoC development process (e.g. synthesis, CDC/RDC, static timing analysis, formal equivalence checking, UVM Verification etc.)

Note: This position is primarily remote with periodic meetings in the Vancouver area.

Annual Salary Range for jobs which could be performed in Canada

Key Responsibilities:

• Develop and Optimize Verification Environments: Create and enhance verification plans, test benches, and test environments for different levels of System-on-Chip (SoC) design.
• Execute Simulations and Debug Issues: Run tests, simulations, and emulations to analyze performance, power usage, and uncover design bugs.
• Investigate and Resolve Bugs: Debug issues in the pre-silicon phase, identify root causes, and implement corrective actions.
• Write and Maintain High-Quality Code: Develop and document verification code while following best coding practices and standards.
• Collaborate Across Teams: Work closely with SoC architects, micro-architects, RTL developers, and validation teams to improve verification processes.
• Enhance Future Verification Strategies: Learn from post-silicon testing to refine methodologies for future product generations.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's degree in electrical engineering, computer engineering, computer science, or in other relevant STEM related degree.
• 4+ years of combined experience in the following:
  • Logic design and/or logic verification.
  • Exposure to SystemVerilog / VHDL hardware descriptive languages.

Preferred Qualifications:

• Graduate/Postgraduatedegree in a STEM field.
• Proven track record of effective debugging and problem-solving.
• Experience in analog and/or digital design.
• Proficiency in C/C++ programming.
• Experience with scripting languages (Python, Perl, etc.).
• Knowledge of low-power design techniques (UPF).
• Hands-on experience in formal verification.
• Familiarity with industry protocols such as DDR, Ethernet, and PCIe.

Annual Salary Range for jobs which could be performed in Canada

Key Responsibilities:

• Develop and Optimize Verification Environments: Create and enhance verification plans, test benches, and test environments for different levels of System-on-Chip (SoC) design.
• Execute Simulations and Debug Issues: Run tests, simulations, and emulations to analyze performance, power usage, and uncover design bugs.
• Investigate and Resolve Bugs: Debug issues in the pre-silicon phase, identify root causes, and implement corrective actions.
• Write and Maintain High-Quality Code: Develop and document verification code while following best coding practices and standards.
• Collaborate Across Teams: Work closely with SoC architects, micro-architects, RTL developers, and validation teams to improve verification processes.
• Enhance Future Verification Strategies: Learn from post-silicon testing to refine methodologies for future product generations.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's degree in electrical engineering, computer engineering, computer science, or in other relevant STEM related degree.
• 2+ years of combined experience in the following:
  • Logic design and/or logic verification.
  • Exposure to SystemVerilog / VHDL hardware descriptive languages.

Preferred Qualifications:

• Graduate/Postgraduatedegree in a STEM field.
• Proven track record of effective debugging and problem-solving.
• Experience in analog and/or digital design.
• Proficiency in C/C++ programming.
• Experience with scripting languages (Python, Perl, etc.).
• Knowledge of low-power design techniques (UPF).
• Hands-on experience in formal verification.
• Familiarity with industry protocols such as DDR, Ethernet, and PCIe.

Annual Salary Range for jobs which could be performed in Canada