Senior Design Verification Engineer Ai/ml Google Cloud jobs at Google in India, Bengaluru
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India
Bengaluru
1,159 jobs found
25.06.2024
G
Google Senior Design Verification Engineer AI/ML Google Cloud India, Karnataka, Bengaluru
Bachelor's degree or equivalent practical experience. 10 years of experience in Electronic Design Automation (EDA) tools and IP/chip design and verification methodologies. Experience in establishing and qualifying SoC design flows...
Bachelor's degree or equivalent practical experience. 10 years of experience in Electronic Design Automation (EDA) tools and IP/chip design and verification methodologies. Experience in establishing and qualifying SoC design flows...
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 16 years of experience in industry on firmware engineering EDA tools, IP/Chip Design,...
16 years of experience in industry on firmware engineering EDA tools, IP/Chip Design, and Verification methodologies. Experience in establishing and qualifying SoC design flow from an EDA reference flow and...
16 years of experience in industry on firmware engineering EDA tools, IP/Chip Design, and Verification methodologies. Experience in establishing and qualifying SoC design flow from an EDA reference flow and...
Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 16 years of experience in Electronic Design Automation (EDA) tools and IP/chip design, physical design, including floorplanning, placement, routing,...
Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 16 years of experience in Electronic Design Automation (EDA) tools and IP/chip design, physical design, including floorplanning, placement, routing,...
Bachelor's degree or equivalent practical experience. 10 years of experience in Electronic Design Automation (EDA) tools and IP/chip design and verification methodologies. Experience in establishing and qualifying SoC design flows...
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