Senior Pr Manager Hardware Innovation Ai jobs at Cisco in United States, San Jose

Your Impact

As an
AI Infrastructure Abstraction Engineer, you will help shape the next generation of AI compute platforms by designing systems that abstract away hardware complexity and expose logical, scalable, and secure interfaces for AI workloads. Your work will enable multi-tenancy, resource isolation, and dynamic scheduling of GPUs and accelerators at scale — making infrastructure programmable, elastic, and developer-friendly.

You will bridge the gap between raw compute resources and AI/ML frameworks, allowing infrastructure teams and model developers to consume shared GPU resources with the performance and reliability of bare metal, but with the flexibility of cloud-native systems. Your contributions will empower internal and external users to run AI workloads securely, efficiently, and predictably — regardless of the underlying hardware topology.

This role is critical to enabling AI infrastructure that is multi-tenant by design, scalable in practice, and abstracted for portability across diverse platforms.

KEY RESPONSIBILITIES

• Design and implement infrastructure abstractions that cleanly separate logical compute units (vGPUs, GPU pods, AI queues) from physical hardware (nodes, devices, interconnects) .
• Develop runtime services, APIs, and control planes to expose GPU and accelerator resources to users and frameworks with multi-tenant isolation and QoS guarantees .
• Architect systems for secure GPU sharing , including time-slicing, memory partitioning, and namespace isolation across tenants or jobs.
• Collaborate with platform, orchestration, and scheduling teams to map logical resources to physical devices based on utilization, priority, and topology.
• Define and enforce resource usage policies , including fair sharing, quota management, and oversubscription strategies.
• Integrate with model training and serving frameworks (e.g., PyTorch, TensorFlow, Triton) to ensure smooth and predictable resource consumption.
• Build observability and telemetry pipelines to trace logical-to-physical mappings, usage patterns, and performance anomalies.
• Partner with infrastructure security teams to ensure secure onboarding, access control, and workload isolation in shared environments.
• Support internal developers in adopting abstraction APIs, ensuring high performance while abstracting away low-level details.
• Contribute to the evolution of internal compute platform architecture, with a focus on abstraction, modularity, and scalability.

Minimum Qualifications:

• Bachelors + 15 years of related experience, or Masters + 12 years of related experience, or PhD + 8 years of related experience
• Experience building scalable, production-grade infrastructure components or control planes using Go, Python, and C++ ,
• Experience with Kubernetes, Docker or Kubevirt for v irtualization, containerization , and orchestration frameworks
• Experience designing or implementing logical resource abstractions for compute, storage, or networking with a focus in multi-tenant environments .
• Experience integrating with AI/ML platforms or pipelines (e.g., PyTorch, TensorFlow, Triton Inference Server, MLFlow).

Preferred Qualifications:

• Experience with GPU sharing, scheduling, or isolation techniques (e.g., MPS, MIG, time-slicing, device plugin frameworks, or vGPU technologies).
• Solid grasp of resource management concepts including quotas, fairness, prioritization, and elasticity.

The application deadline is being extended, expected to close August 29th, 2025.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Your Impact

You will engage and drive the teams working on Design for Reliability. You will build and innovate in data analytics to enable faster quality through AI/ML data models. You will plan and develop test teams to drive FA and Qualification activity.

Responsibilities

• Plan strategic, scalable engagement with Reliability Services and Equipment providers with respect to Silicon One Product roadmap.
• Support and work with the design team to understand and define reliability requirements of products.
• Conduct design review and close loops with the design team to fix design issues affecting Q& R.
• Define and ensure process for ORM is implemented and effective.
• Engage qualification failures to RCCA using structured problem-solving methods (Cause and Effect diagrams, 8D and 5-Whys ) with a multi-functional team to diagnose, resolve, and prevent future problems. Recommend and manage failure analyses of quality failure to root cause. Work in conjunctions with teams to set up methodology and equipment for dynamic FA.
• To improve ongoing quality, identify and minimize ATE/CFT to system test coverage test gaps. Make sure sensors are used to optimum capability at all test steps and used for system characterization and parametric testing to enable improved quality and reliability monitoring. Come up with new ML test techniques to improve RCCA and prediction.
• Coach, mentor, and grow junior engineers to build a strong, resilient technical team
• Clearly present technical updates, risk assessments, and progress to leadership and multi-functional stakeholders
• Continuously assess and refine development methodologies, adopting ground breaking tools and technologies to improve efficiency
• Work with external foundry partners, IP vendors, and strategic customers to align on expectations and resolve critical issues
• Proactively identify project risks and implement mitigation plans throughout the product development lifecycle

Minimum Qualifications

• Masters/PHD or equivalent experience in Engineering, Semiconductor/Quality, Electrical, Electronics, Mechanical Engineering, or relevant field with customer-facing skills and experiences
• 10+ years in a comparable role for semiconductor quality, Customer Quality, Reliability Engineering, Failure Analysis
• Experience in Product & Test Engineering for the semiconductor industry.
• In-depth knowledge of semiconductor device & package fail mechanisms/symptoms
• Multiple roles a plus

Preferred Qualifications

• Hands-on skills in Quality tools and methodologies i.e. Is/Is-Not, Fault Tree Analysis, Fishbone, 5-why, 8D, statistics and structured problem-solving techniques.
• Strong technical problem solving and hands-on skills in quality tools and methodologies.
• Excellent ability to manage both internal and external dynamic environments and circumstances through influence and negotiation skills to respond to challenging information and situations.
• Excellent communication, technical writing and presentation skills.
• Candidate should have a solid quality / engineering background, along with good teamwork and interpersonal skills across worldwide time zones.