Implementation Staff Engineers jobs at Arm in United States, San Jose

You will be working on accelerating ML across a variety of next generation Arm IP.

As part of this role, you will get to work on exciting projects related to functional and performance modeling and analysis - like modeling a new feature in our in-house models, workload characterization, analyzing performance, or developing tools on automation and visualization of the results.

• Functional or performance modeling experience for Hardware IP development
• Strong software development skills including experience with modern C++ and Python
• Strong problem solving and debugging skills
• Strong computer architecture and systems engineering fundamentals
• Good analysis and presentation skills
• Familiarity with Linux development

• Experience with Machine Learning IP development / systems
• Experience with cache-coherent memory system architecture
• Hardware microarchitecture exploration experience

As a verification engineer, you will make a difference by influencing the verification strategy and methodology, taking ownership of complex work packages and driving them to success.

• Meticulous attention to detail, ensuring high-quality verification that minimizes bug escapes.
• Shown experience in block-level verification using UVM or similar methodologies.
• Strong knowledge of coverage driven verification for complex designs.
• Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches.
• Skilled in planning verification tasks and producing realistic effort and time estimates.

• Experience in working with requirements definition and management.
• Formal verification experience.
• Proficiency in developing C/C++ models of a microarchitecture.
• Familiarity with Arm architecture and AMBA bus protocols.
• Experience with CI platforms and version control tools.
• Practical knowledge of machine learning and neural networks.

• Synthesis, Physical design and implementation of CPU and GPU cores, system interconnect and other ARM IP, SoC
• Analyze design timing, area and power to help improve the quality of ARM IP
• Develop and deploy new methodologies to improve implementation efficiency and results
• Support and develop detailed implementation analysis and data-mining methodologies.
• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.
• Converting R&D concepts into real implementation solutions.
• Enable our partners to achieve the best possible quality of results.

• Bachelors or Master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.
• 7+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification
• The ability to demonstrate that you can express new insights and communicate them effectively. Possess a high level of dedicated, initiative and problem-solving skills.
• Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams
• Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Proven programming and scripting skills eg. Tcl, Perl, R, Make, sh.

• Knowledge around Arm based CPUs and SoCs!
• Experience with low power design techniques (power gating, voltage/frequency scaling)
• Experience with Verilog RTL design.
• Experience with ATPG tools/and or production testing.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding!

• Partner and customer focus
• Teamwork and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

You will be working on accelerating ML across a variety of next generation Arm IP.

As part of this role, you will get to work on exciting projects related to functional and performance modeling and analysis - like modeling a new feature in our in-house models, workload characterization, analyzing performance, or developing tools on automation and visualization of the results.

• Functional or performance modeling experience for Hardware IP development
• Strong software development skills including experience with modern C++ and Python
• Strong problem solving and debugging skills
• Strong computer architecture and systems engineering fundamentals
• Good analysis and presentation skills
• Familiarity with Linux development

• Experience with Machine Learning IP development / systems
• Experience with cache-coherent memory system architecture
• Hardware microarchitecture exploration experience

• Synthesis, Physical design and implementation of CPU and GPU cores, system interconnect and other ARM IP, SoC
• Analyze design timing, area and power to help improve the quality of ARM IP
• Develop and deploy new methodologies to improve implementation efficiency and results
• Support and develop detailed implementation analysis and data-mining methodologies.
• Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.
• Converting R&D concepts into real implementation solutions.
• Enable our partners to achieve the best possible quality of results.

• Bachelors or Master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.
• 7+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification
• The ability to demonstrate that you can express new insights and communicate them effectively. Possess a high level of dedicated, initiative and problem-solving skills.
• Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams
• Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Proven programming and scripting skills eg. Tcl, Perl, R, Make, sh.

• Knowledge around Arm based CPUs and SoCs!
• Experience with low power design techniques (power gating, voltage/frequency scaling)
• Experience with Verilog RTL design.
• Experience with ATPG tools/and or production testing.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding!

• Partner and customer focus
• Teamwork and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

As an experienced C/C++ engineer, you will develop boot & firmware team for an exciting new range of Arm hardware devices. You will be working hands-on to configure, extend and support open-source and proprietary firmware, and to ensure these operate correctly, securely and with high performance.

• Working across the complete software lifecycle, including requirements, planning, development, release and support and maintenance
• Developing production quality boot software and firmware

• Demonstrable experience in the full software lifecycle from requirements to release, including support and maintenance
• Deep understanding of developing, porting and configuring boot software and firmware in C/C++
• Proficient in software bring-up and debug using simulation models, FPGAs and real hardware

• Experience with common firmware packages for Arm, such as SCP Firmware, Trusted Firmware (TF-A or TF-M), or Runtime Security Engine (RSE)
• Familiarity with the Arm Architecture and software ecosystems

Job Description

Responsibilities

As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs.
You will work with the project team to understand and review the architecture, and develop the design specifications.
Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks.
You will work with the verification team to review test plans, and help debug design issues.
You will work with the performance analysis team to evaluate and improve subsystem performance.
You will also contribute to developing and enhancing the design methodologies used by the team.
You will guide and support other members of the team as needed to enable the successful completion of project activities.
You will balance other opportunities such as working with Project Management on activities, plans, and schedules

Required Skills and Experience:

In addition to bringing your accomplishment of either Bachelors or Master’s degree or equivalent experience in Computer Science or Electrical/Computer Engineering.
Experience of 15+ years working in design of complex compute subsystems or SoCs, you will need:A thorough understanding and experience of the current design techniques for complex SoC development.
Experience creating design specifications
Experience developing RTL for SoC projects
Experience with Perl, Python or other scripting language

Desired Skills and Experience: