Senior Verification Engineer jobs at Arm in United Kingdom, Manchester

• Travel across Europe and the UK, supporting our partners in the games industry in their use of Arm technology
• Collaborating closely with your counterpart team in China to share knowledge
• Keeping up to speed on the latest graphics techniques, learning from other teams within the company
• Sharing lessons learned and providing feedback to our research and tooling development teams, driving our future roadmaps

• Understanding of modern Game Engine rendering pipelines
• Ability to debug and modify graphics features
• Graphics profiling knowledge
• Modern graphics API knowledge (Vulkan, DirectX12)
• Shader development and optimization skills
• Excellent communication and collaboration skills
• The ability to integrate yourself as a guest in a new team and share your knowledge while respecting the domain and skills of the team you are advising
• High debugging skills for both CPU and GPU
• Experience in working with large codebases, both adding features and maintaining
• Programming experience (C++ and shader languages)
• Experience with version control system and delivering software.

• Shader development and optimisation skills
• Debugging skills for both CPU and GPU
• Experience in working with large codebases, both adding features and maintaining
• Knowledge of emerging AI graphics techniques
• Games proven experience, ideally as part of an engine / CoreTech team
• Familiarity with CI pipelines and validating / testing the codebase

Support DFT on multiple types of projects in multiple design centers and apply innovative DFT techniques and affect the content of forthcoming CPU, GPU, ML and systems IP, some years before they appear in mainstream products. This candidate will contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping other specialists on projects, detailing work through documentation, working with EDA vendors and propagating DFT methodologies. This position may also include meeting with customers for DFT training or to address DFT concerns.

• This role is for a Senior or Staff DFT engineer with 7 years plus experience
• Experience with Perl, TCL, and/or python with ability to build and deploy generic DFT flows
• Proficient in Unix/Linux environments
• One or more core DFT skills is considered crucial for this position including some of the following
• Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, SSN, crafting and conducting experiments/tool evaluations.
• Experience with Siemens, Cadence and/or Synopsys DFT tools
• Qualified candidates will have a university degree or equivalent experience in Electronic Engineering, Computer Engineering, or other relevant technical subject area.

• Familiarity with IEEE standards such as 1500, 1149.1, 1687 and 1838
• Familiarity with supporting silicon into volume production
• Knowledge of SSN and 3DIC
• Gained some exposure to digital ASIC frontend and backend design & verification processes
• Hands-on Synthesis and Static Timing Analysis (STA) experience
• Familiarity with SOC architectures (Auto/Infrastructure/Client) and low power design practices would be an advantage
• Understanding of Functional Safety as it applies to DFT
• Solid understanding of Siemens MBIST and LBIST tools
• Exposure to simulation and formal verification tools
• Exposure to AI tools for execution
• Exposure Arm MBIST interface

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

• Partner and customer focus
• Collaboration and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

• Use knowledge of I/O subsystems and SoCs to integrate PCIe, DDR, and other High-Speed IO IP for SoCs.
• Collaborate within a project team to review architecture and develop design specifications.
• Write micro-architecture specs, develop RTL, fix bugs, and run design checks.
• Work with the verification team to analyse test plans and debug design issues.
• Partner with the performance analysis team to evaluate and improve I/O performance.
• Support backend implementation by aiding floor planning, constraints, and timing closure.
• Contribute to enhancing design methodologies used by the team.
• Guide and support team members to ensure project success.
• Assist Project Management with activities, plans, and schedules.

• Experience in developing and integrating subsystems for PCIe, DDR/LPDDR, HBM, UCIe, Ethernet
• Experience in RTL design for sophisticated SoC development using Verilog and/or SystemVerilog.
• Proficiency in static design checks, synthesis, timing analysis, power management, and power/clock domain crossing.
• Exposure to all design stages: concept, specification, implementation, power/performance analysis, optimisation, testing, documentation, and support.
• Produce specifications and documentation for sophisticated designs.
• Knowledge of shell scripting (e.g., Tcl, Perl, Python, etc.).

• Experience with Arm-based designs and/or Arm System Architectures
• Exposure to interconnect design or architecture
• High level programming experience such as C/C++ and/or assembly language programming
• Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures.

You’ll contribute to the FPGA prototype validation process, ensuring timely delivery of high-quality platforms to end-users in ARMs Software, performance-analysis and SoC-validation teams. You’ll act as an intermediary between platform end-users and SoC development team(s), providing triage and debug support. This role requires a strong focus on engineering efficiency, the successful candidate will possess strong test automation skills and understanding of the benefits brought by continuous integration methodologies.

• Commissioning of FPGA prototyping hardware including specification of peripheral hardware.
• Validation of sophisticated SoC prototypes
• Gathering platform requirements from key partners, ensuring these are implemented and where not possible/feasible providing alternative solutions
• Building test flows and automation environments.

• Strong C programming skills.
• Understanding of linux and bare-metal peripheral drivers.
• Strong scripting skills, Python, TCL, C-shell, GNU Make.
• Recent experience in software development or product validation, tests automation and continuous integration frameworks
• Embedded software knowledge for debug and test.
• A creative and structured approach to problem-solving.
• Excellent written and spoken English; ability to write coherent documentation.

• Experience of AMBA protocols and Arm CPU and System IP.
• Experience of high-speed IO interface standards such as USB, MIPI C/D-PHY, UFS, etc...
• Understanding of SoC verification, in particular directed-C based environments.
• Knowledge/Experience of PCIe/CXL and DDR memory sub-systems.

You will expand your expertise, be challenged and work with advancing technologies. You will work alongside many other engineering teams including software, SoC implementation and verification. You will be involved in deep technical discussions, working with top class multifunctional engineering team

Responsibilities:

• Writing test plans, defining test methodologies, completing functional verification to the required quality levels and schedules
• Working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
• Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation,FPGA and board development
• Staff Engineers are also encouraged to mentor junior members

Required Skills andExperience :

• Worked on embedded C/C++ based SoC verification environments
• Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.)
• Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation
• Exposure to all stages of verification: requirements collection, creation of verificationmethodology plans, test plans, testbench implementation, test case development, documentation and support
• Practical experience of verifying onprocessor based system designs
• Technical team leadership, mentoring or coaching experience

“Nice To Have” Skills andExperience :

• Understanding of the fundamentals of Arm system architectures
• Power aware and Clock Domain Crossing implementation
• Experience in embedded operating systems, device drivers,microprocessor and embedded system hardware architectures.
• Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet
• Development and deployment of large SoCs on emulation platforms

In Return:

We offer a competitive reward package including healthcare and wellness support. Other benefits include a contributary pension, and 25 days annual leave (with option to buy an additional 5 days per year).

Responsibilities:

• Accountable for ensuring our performance tools provide the automated insights to solve performance issues. Establish the 'what do I do next' insights for performance workflows.
• Grow into a go-to expert on performance workflows on Arm Neoverse platforms, driving user impact by bringing technical insights from across the organization to life in tooling.
• Work with product, UX (user experience) and engineering to help specify and test required features in the tool.
• Craft end to end application performance issues as demonstrable examples and tests.
• Build online support documentation and code examples for developers debugging performance problems through our learning paths.

Required Skills and Experience:

• Proven experience identifying and resolving performance issues in server and cloud contexts with a deep understanding of computer architecture.
• Familiarity with performance profiling and monitoring tools (e.g., VTune, New Relic, Datadog, AppDynamics, Grafana, Prometheus).
• A passion and history of writing and sharing technical knowledge.
• Proficient in both high and low level programming preferably with C++ and Python.

“Nice To Have” Skills and Experience:

• Applicable knowledge of the Arm architecture and how it differs from x86.
• Technical leadership roles and responsibilities.

• Developing high performance (in terms of both quality and compute utilisation) components to multimedia (camera, video, display) pipelines.
• Contributing to system level design of a variety of use cases addressing multimedia processing.

• Software development in python and c++
• Machine learning model development in e.g. tensorflow/pytorch
• Development of algorithmic components to imaging and/or multimedia software

• Experience in low level optimisation of Machine Learning and/or Imaging operations for specific hardware targets.
• Machine Learning model and data operations (ML Ops)