Soc Verification Lead jobs at Arm in United Kingdom, Cambridge

• Implement verification strategies to ensure detailed testing of the assigned Subsystem or SoC module.
• Work closely with design engineers, architects, and other verification engineers to understand design requirements and plan verification.
• Apply excellent verbal and written communication skills to report verification progress, issues, and results to customers.
• Automate test cases and regression suites to improve verification efficiency and coverage.

Required Skills and Experience :

• Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL.
• Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals.
• Experience with Tcl, Python or other scripting languages.

• Experience with ARM-based designs and/or ARM System Architectures.
• Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM.
• Knowledge of memory subsystems and/or high speed peripherals (e.g. PCIe/CXL) will be a plus, including integration of these IP models into a design.

Verification engineers in the GPU Group are responsible for innovation and development of next-generation GPU IP for graphics and compute.

Required Skills and Experience

• Strong hands-on experience in System Verilog and UVM methodology OR formal verification
• Exposure to all stages of unit verification: collection of requirements, defining test methodologies, writing test plans, developing testbenches and test cases, debugging complex designs and testbenches, coverage closure.
• Excellent communication skills and ability to work in a large team.

• Experience with both UVM & formal verification
• Experience working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
• Experience mentoring team members or reviewing other’s technical work.
• Knowledge of scripting (e.g. Python, Perl or Unix shell scripting).
• Experience with continuous integration platforms (e.g., Jenkins) and version control systems (e.g., Git).
• Experience with verification for Safety and Security requirements.
• Understanding of the fundamentals of computer architecture.

For a Silicon demonstrator, you will lead the installation and the verification of all the TPIP EDA models to ensure they are in line with the Arm SoC design flow requirements, and they adhere to DFX (Design for Test, Debug, Reliability, Manufacturing and Yield) requirements as defined by Arm. For that, you will use the IP Qualification flow along with the EDA tools from major providers. You will analyze the deviations and share them with the SoC design teams for review and eventually report them to the IP providers for update. As a senior engineer, you will propose and lead the implementation of new checks to improve the coverage and to better ensure the compliance of the receivables with SoC flow and DFX.

• At least 15 years of post-master degree work experience in IP design or verification and/or implementation and signoff.
• At least two of the following experiences are required:

1. Functional verification of IP blocks/subsystems.
2. RTL code Linting and CDC/RDC verification.
3. Scan stitching, ATPG and patterns simulation.
4. Synthesis, lowe-power (UPF) physical implementation and verification, timing and power signoff.
5. Power grid integrity (electro-migration, voltage-drop) and physical checks.

• Scripting for tasks automation with Shells (e.g. Bash), TCL, Python or any other language.
• Excellent interpersonal skills, strong initiative and open in engaging and learning various IP and the SoC reference design flow.

• Experience in Verify-IP usage for Interface IP protocol verification.
• Boundary scan integration (IEEE-1149).
• SI/PI (signal/power integrity) checks at chip/package level.
• Functional Safety and Cyber Security requirements.

We have a friendly and high-performance working environment, where Arm offers a competitive benefits package in Austin including: private medical insurance (employee and family), 20 days annual leave, 20-day sabbatical every four years, supplementary pension and reduction in working hours.

As a Staff Software Engineer, you will own one or more engineering platforms and their delivery. You will work with engineers, project management and stakeholders to define the platform roadmap and improve the impact of services for our engineering community.

Lead the developer portal platform team, providing an outstanding engineering experience for Arm's hardware and software engineers. The domains and areas include:

• Define a roadmap of future work, carry out customer management and regularly present a view of customer interest and asks.
• Drive Developer Experience Improvements - Collect feedback from internal teams to continuously improve portal UX, performance, and capabilities that reduce cognitive load and improve onboarding, discoverability, and self-service.
• Collaborate Across Engineering & IT - Partner closely with platform, software and hardware teams to integrate services, tooling, and policies into the portal in a user-centric and automated manner.
• Work hands-on with a variety of technologies, to provide a first-class engineering experience for Arm's hardware and software engineers
• Line management and professional development of the platform team members.

• Experience of Product/Service ownership, setting the roadmap direction, leading the delivery backlog and representing customers needs to the engineering team.
• Worked in a Platform Engineering environment, with the associated focus on developer experience and productivity, and the ethos of enabling self-service access to infrastructure and systems through automation.
• Background in software engineering and DevOps having worked with varied languages, toolchains and environments.

• Experience in building or integrating developer tools, platforms, or portals, such as Backstage.
• Proficiency in web development with React, TypeScript and Node and experience with Bash and Python.
• Solid understanding of Cloud platforms (AWS, GCP, Azure) with knowledge of Kubernetes, and other DevOps tools (e.g. Docker, Kubernetes, Terraform, Helm, ArgoCD) and CI/CD (Jenkins, Artifactory, Gitlab).

You will ensure all these products work effectively with each other and the software to enable our partners to produce outstanding systems!

We're currently hiring for Senior and Staff level Verification Engineers. Your day-to-day responsibilities will depend on your level of experience, but could include:

• Your key responsibilities will include writing test plans, defining test methodologies, developing testbenches and tests, and debugging of test failures and issues.
• Working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
• Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis and formal verification.
• Staff Engineers are also encouraged to mentor junior members

• Understanding of digital hardware design and Verilog/SystemVerilog HDL
• Experienced in one or more of various verification methodologies – UVM/OVM, formal, power aware verification, emulation
• Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support
• Experience with relevant coding languages: SystemVerilog, c++ and python
• Good Problem Solving and Debugging skills.

• Experience with ARM Architecture
• Knowledge of cache coherency protocol and AMBA protocols like CHI and AXI
• knowledge on scripting, automation

As a member of the design team, you will be involved in the specification, design and verification of various compute subsystems.

Your key responsibilities will include writing micro-architecture specifications, developing the RTL and running various design checks. Additionally, you will work with the verification team to review test plans and help debug design issues and the implementation team to optimise those designs. You will plan your work, provide tracking and report status in order to ensure high-quality and timely delivery.

• Hands-on working knowledge of System Verilog or Verilog HDL for RTL design
• Solid understanding of RTL design for complex SoC development
• Experience in the following areas: static design checks, power and clock domain crossing, synthesis
• Understanding of the fundamentals of computer architecture and systems and practical experience of working on Processor based system designs
• Knowledge of scripting eg Python, Perl or unix shell scripting
• Ability to write specifications and documentation describing complex designs

• Exposure to Arm-based designs, Arm System Architectures and AMBA standards
• Involvement in development and integration of subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
• High level programming experience such as C/C++ and/or assembly language programming
• Participation in global IP and SoC development projects

Job Overview:

As a member of this team your day-to-day work will consist primarily of driving verification of SoC (System on Chip) RTL designs that are modified for FPGA implementation, developing and maintaining SoC verification testbench, integrating third party VIPs, writing Testcases in C, reusing C Testcases from internal IP/ SoC frontend team, creating test-plans, developing tools using scripting languages like Python, Perl, Shell for automation of tasks.

Responsibilities:

• Implement and execute verification strategies to ensure detailed testing of the assigned Subsystem or SoC module.
• Work closely with design engineers, architects, and other verification engineers to understand design requirements and plan verification.
• Apply excellent verbal and written communication skills to report verification progress, issues, and results to customers.
• Automate test cases and regression suites to improve verification efficiency and coverage.

Required Skills and Experience :

• Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL.
• Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals.
• Experience with Tcl, Python or other scripting languages.

“Nice To Have” Skills and Experience :

• Experience with ARM-based designs and/or ARM System Architectures.
• Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM.
• Experience with verification methodologies – UVM/OVM.
• Knowledge of PCIe and CXL will be a plus.