Cpu Ml Rtl Architect jobs at Apple

Minimum BS and 3+ years of relevant industry experience. Scripting skills in Tcl or Perl. Experience in one or more of the following: Static Timing Analysis (STA), Clock-Domain Crossing (CDC),...

Apple CPU CDC/STA Engineer United States, West Virginia

Limitless High-tech career opportunities - Expoint

As a CPU CDC/STA Engineer, you will play a major role analyzing the design and driving fixes as well as developing, maintaining and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints and methodology for our CPUs across multiple design sites.

In this role, you will be: • Responsible for developing, improving, and maintaining the CDC and RDC sign-offs for CPU designs• Working with RTL and DV teams to recommend System Verilog assertions needed to support CDC/RDC/STA constraints and assumptions• Responsible for developing, enhancing, and maintaining key STA checks and associated sign-offs for our CPUs• Responsible for debugging vendor tool problems and collaborate with designers to help solve their problems• Working closely with EDA vendor representatives to drive improvements and new methodologies• Working closely with RTL, Verification, CAD, and Physical Design teams

Minimum BS and 3+ years of relevant industry experience
Scripting skills in Tcl or Perl
Experience in one or more of the following: Static Timing Analysis (STA), Clock-Domain Crossing (CDC), or Reset Domain Crossing (RDC) solutions
Experience in Verilog

Experience in SystemVerilog Assertions (SVA) and Design Verification (DV) Simulations
Knowledge in Spyglass, VC-Static, PrimeTime, or Meridian is a plus

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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Apple CPU CDC/STA Engineer United States, California

Apple CPU CDC/RDC/STA Engineer United States, West Virginia

Apple CPU CDC/RDC/STA Engineer United States, California

Apple STA Engineer United States, West Virginia

7+ years of coding skills. Background in computer science: algorithms and data structures. Experience with AWS Services such as Amazon S3 EC2 EKS / Kubernetes. Proficient in designing, developing, and...

Apple AIML - Sr/Staff ML Engineer Machine Learning Platform & Inte... United States, West Virginia

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

7+ years of coding skills
Background in computer science: algorithms and data structures
Experience with AWS Services such as Amazon S3 EC2 EKS / Kubernetes
Proficient in designing, developing, and deploying high-performance, reliable, and scalable software solutions in production

Excellent interpersonal skills able to work independently as well as in a team

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Minimum BS and 10+ years of relevant industry experience. Experience in driving chip implementation from definition phase to silicon correlation. Experience working with cross-functional teams spanning technology, architecture, RTL &...

Apple CPU Implementation Lead Engineer United States, West Virginia

As a CPU Implementation Lead Engineer, you will own or participate in the following: • CPU IP delivery. • Work with multi-functional engineering teams to implement and validate physical design in the aspects of timing, power, area, electrical analysis, functionality, reliability, and testability.• Work extensively with the partition implementation team to make area/frequency/performance/power tradeoffs and remove bottlenecks in meeting design targets and delivery schedule.• Participate in the definition and enhancement of RTL-to-GDS flow through synthesis and place-and-route targeting aggressive targets for power, performance, and area.• Mentor junior engineers.

Minimum BS and 10+ years of relevant industry experience
Experience in driving chip implementation from definition phase to silicon correlation
Experience working with cross-functional teams spanning technology, architecture, RTL & Physical design
Experience in synthesis & place-and-route

Familiarity with high performance microprocessor architecture fundamentals
Experience in leading initiatives for improving power, performance, & area on CPUs
Knowledge of logic design principles along with timing and power implications
Understanding of low power microarchitecture and implementation techniques
Experience with scripting in Perl and/or TCL
Design experience in deep submicron technologies and basic transistor level design and device physics

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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BS degree in technical discipline. Solid understanding of mixed signal concepts, RTL design, Verilog and SystemVerilog. Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers). Validated knowledge of...

Apple RTL Design Engineer United States, West Virginia

Are early in your journey towards a chip design career and wish to challenge yourself in a technical and multi-disciplinary effort, we have an exciting position for you in the world class Apple mixed-signal silicon design team. This position will encourage building of a solid foundation in logic circuits and gentle entry into understanding analog circuits. You will gain transparency into a variety of flows fundamental to modern silicon engineering: insight into full custom schematics for analog as well as high-speed digital circuits, translating functionality of such circuits into an efficient software behavioral representation, simulation of such code and ensuring formal equivalence between custom designs and their abstract representation. You will gain experience and knowledge into software methods and analysis that is increasingly important for a variety of disciplines.

In this job you will get the opportunity to gain knowledge in designing micro-architecting digital blocks within sophisticated mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.

BS degree in technical discipline.

Solid understanding of mixed signal concepts, RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
Validated knowledge of synthesis, static timing, DFT, is a plus
Validated knowledge of SystemVerilog assertions, checkers, and other design verification techniques are a plus
Knowledge of scripting languages. Perl and Python are plusses
Strong communication and presentation skills

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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3+ years of proven ability in machine learning, including hands-on work with LLMs. Strong programming skills in Python and experience with ML/NLP libraries. Experience building or fine-tuning LLMs for software...

Apple ML Engineer - Evaluation Automation Siri AI Quality Engineer... United States, West Virginia

Apple has an extraordinary reputation for product quality. We are looking for a versatile Machine Learning Engineer with a strong background in Large Language Models (LLMs) to build the next generation ML evaluation frameworks and tools. In this role, you will use LLMs and other ML techniques to help automate large-scale data generation and evaluation job execution on server or on device, build LLM judges, detect anomalies, and streamline ML evaluation workflows. This is a high-impact role where you'll work at the intersection of AI/ML, conversational agents, information retrieval, software engineering, and ML evaluation, helping us push the boundaries of how AI can transform ML evaluation.

Design and develop machine learning and LLM-based solutions for ML model and system evaluation use cases such as: - Automatic large scale data generation - Automatic UI and Non UI test evaluation - Run evaluation jobs at scale - Build and optimize LLM judges - Intelligent log summarization and anomaly detection - Continuously evaluate and improve model performance through A/B testing, human feedback loops, and retraining- Monitor advances in LLMs and NLP and propose innovative applications within the ML evaluation domain

3+ years of proven ability in machine learning, including hands-on work with LLMs.
Strong programming skills in Python and experience with ML/NLP libraries
Experience building or fine-tuning LLMs for software engineering tasks
Understanding of prompt engineering, and retrieval-augmented generation (RAG)
Experience developing LLM based automated evaluation frameworks
Excellent knowledge of software testing methodologies & practices

Experience in Swift/XCTest/XCUITest is preferred
Ability to thrive in a collaborative working environment within your team and beyond
Ability to triage problems, prioritize accordingly, and propose resolutions

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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Minimum BS and 10+ years of relevant industry experience. Programming skills in Perl/Python or SystemVerilog. Experience in processor or power management architecture and verification. Experience with system fabric protocols such...

Apple CPU Debug Power Management Verification Engineer United States, West Virginia

• You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs.• Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic• Develop and execute test plans and schedules• Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments• Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.• Analyze functional coverage to ensure test plan completeness• Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes• Support SoC-level debug for clock and power integration issues• Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon. Contribute to post-silicon debug, using waveform and trace tools to diagnose complex system issues.

Minimum BS and 10+ years of relevant industry experience
Programming skills in Perl/Python or SystemVerilog

Experience in processor or power management architecture and verification
Experience with system fabric protocols such as AXI
In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
Experience in processor debug features including hardware trace is a plus
Experience with advanced verification techniques such as formal verification is a plus
Advanced programming skills such as object orientated programming or CPU assembly language is a plus
Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design

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Demonstrated expertise in deep learning with a publication record in relevant conferences (e.g., NeurIPS, ICML, ICLR, CVPR, ICCV, ECCV, KDD, ACL, ICASSP, InterSpeech) or a track record in applying deep...

Apple AIML - ML Researcher Foundation Models United States, West Virginia

We believe that the most interesting problems in deep learning research arise when we try to apply learning to real-world use cases, and this is also where the most important breakthroughs come from. You will work with a close-knit and fast-growing team of world-class engineers and scientists to tackle some of the most challenging problems in foundation models and deep learning, including natural language processing, multi-modal understanding, and combining learning with knowledge. Further, you will have opportunities to identify and develop novel applications of deep learning in Apple products. You will see you ideas not only published in papers, but also improve the experience of billions of users.

Demonstrated expertise in deep learning with a publication record in relevant conferences (e.g., NeurIPS, ICML, ICLR, CVPR, ICCV, ECCV, KDD, ACL, ICASSP, InterSpeech) or a track record in applying deep learning techniques to products
Proficient programming skills in Python and one of the deep learning toolkits such as JAX, PyTorch, or Tensorflow
Ability to work in a collaborative environment
PhD, or equivalent practical experience, in Computer Science, or related technical field

Web-scale information retrieval
Human-like conversation agent
Multi-modal perception for existing products and future hardware platforms
On-device intelligence and learning with strong privacy protections

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

AppleCPU CDC/STA Engineer

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United States, West Virginia

823559600

09.09.2025

Minimum BS and 3+ years of relevant industry experience. Scripting skills in Tcl or Perl. Experience in one or more of the following: Static Timing Analysis (STA), Clock-Domain Crossing (CDC),...

Description:

Minimum BS and 3+ years of relevant industry experience
Scripting skills in Tcl or Perl
Experience in one or more of the following: Static Timing Analysis (STA), Clock-Domain Crossing (CDC), or Reset Domain Crossing (RDC) solutions
Experience in Verilog

Experience in SystemVerilog Assertions (SVA) and Design Verification (DV) Simulations
Knowledge in Spyglass, VC-Static, PrimeTime, or Meridian is a plus

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.