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Camera Image Sensor Analog & Mixed-signal Design jobs at Apple in United States, Irvine

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Irvine
27 jobs found
26.08.2025
A

Apple RFIC - PLL Design Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and 10 + years of relevant industry experience. Solid experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design. Experienced in the design and development of fractional...
Description:
As an RFIC-PLL Designer, you will provide analog and digital PLL solutions for wireless SoC and drive them to mass production for Apple. Responsibilities include: - Lead design of radio transceiver chains including analog PLLs - VCOs, digital PLLs - DCOs, LOGen, and chain of blocks in RX, and TX for wireless connectivity products.- Drive radio KPI (power, area, performance) to meet product requirements - Work with multi-functional teams, including platform architecture, wireless design, RF HW, and SW, to define radio features enabling wireless innovation. - Work closely with RF Systems on block-level and high-level specifications of the PLL-LOGen, TX and RX line-ups and the accurate distribution of spec margins in the chain.- Design of RF and Analog loopbacks for calibration and compensation.- Work through Co-Existence scenarios and design to meet the CoEx requirements.- Lead all aspects of the floorplan layout and verification of the design to ensure a successful tape-out.- Provide design versus silicon measurements correlation and compliance with volume production specifications.
  • BS and 10 + years of relevant industry experience.
  • Solid experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
  • Experienced in the design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for high-performance applications and also low power applications.
  • Hands-on experience in designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, and MMD, DCOs, PFD-CP, and VCOs. Modeling, analysis, and design of SD noise cancellation and spur cancellation techniques.
  • Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.
  • Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).
  • Extensive experience in fractional N synthesizer and LOGen silicon characterization and debugging.
  • Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
  • Deep understanding of analog, mixed-signal, and RF circuit design. This includes LNAs, PAs, mixers, baseband filters, VGAs, and calibration methods associated with high-performance wireless systems.
  • Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.
  • Proven capability working with digital design group for an optimum partition between digital and analog domain, and timing requirements.
  • MSEE and/or PhD with extensive experience.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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25.08.2025
A

Apple RFIC - PLL Design Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and 3 + years of relevant industry experience. Experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design. Experienced in the design and development of fractional N...
Description:
As an RFIC-PLL Designer, you will provide analog and digital PLL solutions for wireless SoC and drive them to mass production for Apple’s Wireless Connectivity products. Responsibilities include: - Lead design of radio transceiver chains including analog PLLs - VCOs, digital PLLs - DCOs, LOGen, and chain of blocks in RX and TX.- Drive radio KPI (power, area, performance) to meet product requirements. Work with multi-functional teams, including platform architecture, wireless design, RF HW, and SW, to define radio features enabling wireless innovation. - Work closely with RF Systems on block-level and high-level specifications of the PLL-LOGen, TX and RX line-ups and the accurate distribution of spec margins in the chain.- Hands-on design contributions, from concept, architecture, and topology to transistor-level feasibility studies and KPI trade-off analysis to actual design, simulations, and extractions.- Responsible for the floorplan layout and verification of the design to ensure a successful tape-out and work through Co-Existence scenarios and design to meet the CoEx requirements.- Provide design versus silicon measurements correlation and compliance with volume production specifications.
  • BS and 3 + years of relevant industry experience.
  • Experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
  • Experienced in the design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for high-performance applications and also low power applications.
  • Hands-on experience designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, MMD, DCOs, PFD-CP, and VCOs. Modeling, analysis, and design of SD noise cancellation and spur cancellation techniques.
  • Skilled in using Cadence Virtuoso, Spectre RF, Matlab, and EM simulation tools (e.g., EMX, HFSS).
  • Familiarity with mixed-signal verification methodologies (SystemVerilog, AMS, Nanotime).
  • Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
  • Extensive knowledge in fractional N synthesizer and LOGen silicon characterization and debugging.
  • Deep understanding of analog, mixed-signal, and RF circuit design. This includes LNAs, PAs, mixers, baseband filters, VGAs, and calibration methods associated with high-performance wireless systems.
  • Familiarity with various RF transceiver architectures and their trade-offs and system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.
  • MSEE and/or PhD with extensive experience.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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25.08.2025
A

Apple Wireless Systems Algorithm Design Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and a minimum of 3 years relevant industry experience. Extensive experience on design and develop the physical layer core algorithms, such as MIMO signal estimation and detection, channel estimation,...
Description:
In this technical role, you will be at the center of our silicon design and bring-up group, responsible for the wireless system design of our innovative wireless SoC products. You will take significant part in developing the next generations of wireless communication systems for enhanced performances and reliability, creating novel algorithms, protocols and architectures. You will participate in cross-functional task forces, comprising of RF/analog, HW, SW, platform designers and architects. This role contains wide responsibly on implementation, verification, validation and bring up our SoC products to the production quality, providing them to our customers!
In this role, you will be required to demonstrate strong analytical skills, innovative thinking, and fundamental knowledge to design the creative algorithms, innovative architectures and protocols, to resolve the challenges and issues and develop the best-in-class solutions in terms of performance, power, and area. You will also collaborate closely with HW digital designers and architects, RF/analog designers, and SW teams to define and specify the wireless systems. Core responsibilities: Design and simulate innovative wireless communication system to enable emerging applications and wireless system products. Implement system models and investigate innovative algorithms for performance enhancements, design and validate them to allow performance sign-off and enable RTL development. Define the control procedures of the physical layer hardware modules to achieve robust and optimal performance of the Modem in congested radio environment with Co-Existing wireless communication systems. Work with digital designers to realize these methods with power and area efficient digital implementations. •Work with firmware designers to realize these methods with high efficiency software implementation, and possibly with hardware acceleration. Bring up, test, characterize and optimize real silicon in lab.
  • BS and a minimum of 3 years relevant industry experience
  • Extensive experience on design and develop the physical layer core algorithms, such as MIMO signal estimation and detection, channel estimation, equalization, coding theory, beamforming, signal estimation and detection, timing recovery, frequency synchronization, automatic gain control, etc.
  • Track record in applying innovative signal processing, communication theory, information theory techniques to resolve the challenging problems of the physical layer design (transmitter/receiver) for modern wireless communication systems.
  • Deep understanding of communication theory, information theory, & signal processing related algorithms design.
  • Strong analytical capability to develop the best-in-class solution in terms of performance, power, and area.
  • C/C++ and Matlab for algorithm development, modeling, and simulation of physical layer
  • Knowledge in existing protocols: 5G/LTE/WCDMA/GSM, 802.11a/b/g/n/ac/ax/be, 802.11ad/ay or Bluetooth/BLE
  • MS and PhD preferred.
  • Deep understanding of components/modules composited of wireless communication systems. The possible impairments from those components and the corresponding calibration and impairment reduction methods/algorithms, digital predistortion, PAPR reduction algorithms, Tx power control, etc.
  • Algorithm development experience with hardware and firmware friendly designs.
  • Experience in modem architecture, microprocessor architecture, hardware and software control.
  • Experience on low-power algorithm design for power critical application.
  • Experience with multi-radio coexistence management.
  • Experience and knowledge on High-Level Synthesis (HLS), silicon prototyping, emulation systems and virtual platforms.
  • Experience on bring up of real silicon in lab and being able to efficiently use lab equipment (such as spectrum analyzer, signal generator, power meter, etc.).
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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24.08.2025
A

Apple ASIC Design & Integration Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and 3+ years of relevant industry experience. This position requires detailed knowledge of the ASIC design flow, synthesis, static timing analysis, scripting, and netlist generation. Relevant design experience in...
Description:
As a Radio Integration Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices. You will help define the processes, methods, and tools for the design and implementation of large complex SoCs. You will develop and maintain methodology and flow checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the blocks. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process.
  • BS and 3+ years of relevant industry experience.
  • This position requires detailed knowledge of the ASIC design flow, synthesis, static timing analysis, scripting, and netlist generation.
  • Relevant design experience in SoC and/or radio/transceiver, PLL Controller.
  • Experience with Digital Mixed Signal design.
  • Extraordinary leadership skills and ability to encourage team members with an innate ability to see the bigger picture.
  • Passion for owning and driving design schedules using well-defined metrics.
  • Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management.
  • Ability to understand and extract action plans from sophisticated technical discussions and translate into succinct messaging for multi-functional and executive status reporting.
  • Excellent debugging skills and shown ability to drive resolution of critical problems.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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07.07.2025
A

Apple ASIC Design & Integration Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and 3+ years of relevant industry experience. This position requires detailed knowledge of the ASIC design flow, synthesis, static timing analysis, scripting, and netlist generation. Relevant design experience in...
Description:
As a Radio Integration Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices. You will help define the processes, methods, and tools for the design and implementation of large complex SoCs. You will develop and maintain methodology and flow checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the blocks. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process.
  • BS and 3+ years of relevant industry experience.
  • This position requires detailed knowledge of the ASIC design flow, synthesis, static timing analysis, scripting, and netlist generation.
  • Relevant design experience in SoC and/or radio/transceiver, PLL Controller.
  • Experience with Digital Mixed Signal design.
  • Extraordinary leadership skills and ability to encourage team members with an innate ability to see the bigger picture.
  • Passion for owning and driving design schedules using well-defined metrics.
  • Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management.
  • Ability to understand and extract action plans from sophisticated technical discussions and translate into succinct messaging for multi-functional and executive status reporting.
  • Excellent debugging skills and shown ability to drive resolution of critical problems.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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These jobs might be a good fit

29.06.2025
A

Apple Wireless SoC Design Engineer United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS and 10+ years of relevant industry experience. Proficient in digital design fundamentals, with a strong foundation. Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power,...
Description:
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions alongside software and firmware engineering teams. Collaborate with physical design, design for testability (DFT), power management, and computer-aided design (CAD) teams to finalize and deliver fully functional IP for SoC integration. Provide support to verification, prototyping, and emulation teams during pre-silicon verification phases, as well as software/firmware development. Assist in post-silicon validation, system integration, and debugging efforts, and address any necessary silicon design revisions promptly.
  • BS and 10+ years of relevant industry experience.
  • Proficient in digital design fundamentals, with a strong foundation.
  • Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
  • Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, Synthesis, STA, and LEC.
  • Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI is a plus.
  • Thorough understanding of cross clock-domain design principles and associated CDC requirements.
  • Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis, is a plus.
  • Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
  • Strong communication skills, both written and oral.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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28.06.2025
A

Apple Camera Image Sensor Analog & Mixed-Signal Design United States, California, Irvine

Limitless High-tech career opportunities - Expoint
BS degree in EE or similar fields. Experience in analog and mixed-signal design for image sensors. MS or PhD degree in EE or other similar fields. 3+ years of relevant...
Description:
This is a multi-functional technology and product development role, and you will work closely with various teams, such as pixel, sensor, substrate, FW, and ISP. In this role, you will: • Collaborate with global sensor suppliers to develop and evaluate new sensors • Develop & drive chip level architecture specifications through the implementation phase• Detailing and communicating your results to multi-functional engineering teams • Working with the internal customer teams to evaluate the contribution of the sensor to system performance • Working with collaborators to assure that sufficient and correct verification/testing is implemented at all stages to guarantee performance• Participate in system integration tasks with multi-disciplinary teams. Working with collaborators to assure that sufficient and correct verification/testing is implemented at all stages to guarantee performance
  • BS degree in EE or similar fields
  • Experience in analog and mixed-signal design for image sensors
  • MS or PhD degree in EE or other similar fields
  • 3+ years of relevant industry experience
  • Knowledge of general industry trends and technical challenges of high performance image sensor manufacturing technology, image sensor performance metrics, image sensor usage and integration into camera systems
  • Experience with high performance and low power image sensor design
  • Experience with modeling and simulating device/system level conceptual designs to explore device/IP/system level performance parameters
  • Ability to methodically derive design and verification requirements from design specifications and drive design activities toward compliance to requirements
  • Excellent written and verbal communication, solid collaboration, and leadership skills
  • Experience with industry standard ASIC design tools and modern design verification techniques in mixed signal environments
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Show more

These jobs might be a good fit

Limitless High-tech career opportunities - Expoint
BS and 10 + years of relevant industry experience. Solid experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design. Experienced in the design and development of fractional...
Description:
As an RFIC-PLL Designer, you will provide analog and digital PLL solutions for wireless SoC and drive them to mass production for Apple. Responsibilities include: - Lead design of radio transceiver chains including analog PLLs - VCOs, digital PLLs - DCOs, LOGen, and chain of blocks in RX, and TX for wireless connectivity products.- Drive radio KPI (power, area, performance) to meet product requirements - Work with multi-functional teams, including platform architecture, wireless design, RF HW, and SW, to define radio features enabling wireless innovation. - Work closely with RF Systems on block-level and high-level specifications of the PLL-LOGen, TX and RX line-ups and the accurate distribution of spec margins in the chain.- Design of RF and Analog loopbacks for calibration and compensation.- Work through Co-Existence scenarios and design to meet the CoEx requirements.- Lead all aspects of the floorplan layout and verification of the design to ensure a successful tape-out.- Provide design versus silicon measurements correlation and compliance with volume production specifications.
  • BS and 10 + years of relevant industry experience.
  • Solid experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
  • Experienced in the design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for high-performance applications and also low power applications.
  • Hands-on experience in designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, and MMD, DCOs, PFD-CP, and VCOs. Modeling, analysis, and design of SD noise cancellation and spur cancellation techniques.
  • Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.
  • Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).
  • Extensive experience in fractional N synthesizer and LOGen silicon characterization and debugging.
  • Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
  • Deep understanding of analog, mixed-signal, and RF circuit design. This includes LNAs, PAs, mixers, baseband filters, VGAs, and calibration methods associated with high-performance wireless systems.
  • Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.
  • Proven capability working with digital design group for an optimum partition between digital and analog domain, and timing requirements.
  • MSEE and/or PhD with extensive experience.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Show more
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