Soc Physical Design Engineer Sta/timing jobs at Apple in United States, Beaverton

Searching for a Physical Design Engineer STA/Timing role in the tech industry? Look no further than Apple in Beaverton, United States! The Physical Design Engineer STA/Timing role is an exciting, but challenging opportunity to design, debug, and enhance hardware, software and system architectures with the team at Apple. We are looking for professionals like you who can work collaboratively and decisively to use their strong analysis skills to bring new ideas to the table. Your work will be pivotal in defining the implementation strategies for complex, multi-million dollar projects. The primary responsibility for the Physical Design Engineer STA/Timing role is the evaluation, design, and implementation of timing constraints throughout the SoC process. You will be expected to work with cross-functional teams, including other engineers and various stakeholders to ensure successful timing closure. This position also requires you to apply an advanced level of analysis and insight to create design rules, run simulations, and verify correct timing for the optimal performance of the SoC chip. Other duties may include developing/optimizing environment and scripts for timing analysis, synthesis, and testing as well as suggesting corrective or preventive actions for existing projects. If you have several years of experience in the tech industry working in physical design and STA/timing and are looking to put your problem solving skills to the test, look no further than Apple! Apply today to be a part of an innovative team in Beaverton as their next Physical Design Engineer STA/Timing.