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Cisco ASIC Design Engineer Technical Leader 
United States, North Carolina, Cary 
434649406

31.03.2025
The application window is expected to close on: April 28, 2025.
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
This role requires being onsite in our RTP, NC office 4+ days/week.
Your Impact
  • Development of high-performance designs/ASICs from specification to tape-out.
  • Micro-architectural definition, writing micro-architecture and implementation specifications.
  • Implement Verilog RTL to meet timing and performance requirements.
  • Help define, evolve, and support our design methodology.
  • Collaborate with the verification, Physical Design, DFT, Package and Software teams to develop next generation ASICs.
  • Perform diagnostic and post silicon validation tests in the lab.
  • Work with hardware and software teams to triage and root cause system, software, and customer failures.
Minimum Qualifications:
  • Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience.
  • Experience with Verilog and System Verilog programming.
  • Experience in architecture and micro architecture development.
  • Experience delivering ASIC designs from specification to tape-out.
Preferred Qualifications:
  • Master's degree in Electrical or Computer engineering and 6+ years of ASIC Design experience.
  • Proven experience meeting and delivering project milestones and deadlines.
  • Ability to communicate technical concepts to audiences spanning executives to junior engineers.
  • Demonstrated ability in troubleshooting and debugging.
  • Scripting experience (Python, Perl, TCL, shell programming).