This role will be based onsite out of our San Jose, CA office.
Your Impact
- Development of high-performance designs/ASICs from specification to tape-out.
- Micro-architectural definition, writing micro-architecture and implementation specifications.
- Implement Verilog RTL to meet timing and performance requirements.
- Help define, evolve, and support our design methodology.
- Collaborate with the verification, PD, DFT, Package and SW teams to develop next generation ASICs.
- Perform diagnostic and post silicon validation tests in the lab.
- Work with hardware and software teams to triage and root cause system, software, and customer failures.
Minimum Qualifications:
- Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience.
- Experience with Verilog and System Verilog programming.
- Experience in architecture and micro architecture development.
- Experience delivering ASIC designs from specification to tape-out.
Preferred Qualifications:
- Master's degree in Electrical or Computer engineering and 6+ years of ASIC Design experience.
- Proven experience meeting and delivering project milestones and deadlines.
- Ability to communicate technical concepts to audiences spanning executives to junior engineers.
- Demonstrated ability in troubleshooting and debugging.
- Scripting experience (Python, Perl, TCL, shell programming).