דרושים Intel - משרות אינטל

Job Description:

This position is in FFEO (Frontend facilities engineering and operations) organization in Intel Kiryat Gat. This org (Production Infrastructures) supports all technical and logistics aspects required in order to maintain 24/7 manufacturing at the Clean Room at Intel Kiryat Gat. As part of your role, you will be working in the Gas and chemicals operation area, requested to verify systems are functioning well, perform all maintenance activities on the equipment and monitoring the equipment constantly. You will be working in shifts schedule. Systems activities on the shift includes: Read and Rounds, coordination and management of activities, performance of repairs and advanced trouble shooting of equipment (which includes mechanical and electronic systems).

Qualifications:

• You should be an active student for Practical Engineering (הנדסאות ולא לימודי הנדסה) studies inElectrical/Electronics/Mechanical/ Mechatronics/ Chemical/ or Gas/ or equivalent
• Minimum 3-4 full semesters to graduation
• Ability to work 3 shifts a week or more.
• Ability to work in shifts mode, including during the nights, holidays or weekends
• Good communication skills both in Hebrew and in English (written and spoken)

Additional qualifications include:

• High Technical skills - previous technical experience is an advantage
• High level and experience with Excel and Microsoft Office
• Multitasking and ability to set priorities indepentally
• Great team relations
• High customer orientation
• Self-learning ability

Student / InternShift 1 (Israel)Israel, Kiryat-Gat

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

You will be exposed to High-Speed I/O protocols such as PCIe, DDR5, and PAM4 Ethernet, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines.

In this position:

• You will lead a team of developers and also work hands-on to design and develop digital and analog circuit boards for HW-Engineering products.
• Develop board design from schematic through Silicon power-on debug and may interface with other board design and test module development teams to drive innovation initiatives.
• Identifying new hardware solutions, providing technical leadership to working groups/task forces to resolve hardware, schematics, layout, DFx issues through debugging and reviews, and part/component selection management.
• learning the specification of each interface and the required design limitations that should be verified.
• requires high-frequency signal and power integrity and a good understanding of RF circuits and electromagnetic wave propagation.

Qualifications:

• B.Sc./M.Sc. Electrical Engineer with over 10 years of relevant experience in hardware/board design.
• 4+ years as a team lead, including planning and design-flows buildup.
• Experience with PCB technology and layout (Analog and Digital) including stack-up, placement, routing, and SI/PI.
• Lab work experience in high accuracy signals measurement.
• Excellent debugging skills, ability to analyze problems, diagnose the root cause and apply corrective action.
• Familiar with layout technics.
• FPGA and Verilog coding skills.
• Test measurement instrument hands-on operation.
• Programming knowledge and experience.
• Strong verbal and written communication skills in English.
• Comprehensive understanding of system architecture.

Experienced HireShift 1 (Israel)Israel, Petah-Tikva

BSc in Software Engineering/ Electrical Engineering/Computer Engineering.3+ years of experience in embedded systems programming with C/C++.Good communication skills and teamwork.Experience working with SystemC is a big advantage. Object oriented experience, familiarity with Network or specifically WiFi protocols, working with multi-core system flows are welcomed advantages as well.Experience in one or more of the following areas is also an advantage: ASIC design (MAC and/or PHY) or PreSi verification, Embedded FW, Win/Linux OS, C#, C++, Verilog, Python.Experienced HireShift 1 (Israel)Israel, Petah-Tikva

Job Description:Qualifications:Student / InternShift 1 (Israel)Israel, Petah-Tikva

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Key Responsibilities:

• Lead the design and development of SerDes physical layer architectures (transmitter, receiver, equalization, signal integrity).
• Develop and implement calibration methods for optimal PHY performance.
• Integrate new features and products through hands-on lab work.
• Define and develop test suites for proprietary SerDes PHYs.
• Collaborate with digital, hardware, and software teams for seamless system integration.
• Maintain detailed documentation of designs, test plans, and results.
• Resolve complex technical issues to ensure optimal performance.

Required:

• Bachelor’s degree in Electrical Engineering.
• 5+ years of experience in wired or wireless communication systems.
• Hands-on lab experience and solution development.
• Proficiency in C, C#, MATLAB, Python.
• Strong analytical and problem-solving skills.
• Self-motivated, able to execute in uncertain environments.

Preferred:

• Master’s degree in Electrical Engineering.
• Experience in silicon development and SerDes technologies.
• Leadership skills and ability to drive initiatives in a matrix organization.

Experienced HireShift 1 (Israel)Israel, Petah-Tikva

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

What You’ll Do

• Validation architecture and Tests Plans development
• Develop innovative validation methodologies, infrastructure, and content .
• Global Flows deep Dive investigations
• Hardware, Firmware and software advanced debug and bug fix definition

Qualifications:

Requirements:

• Bachelor’s degree in Electronics or Computer Engineering.
• 3+ years of industry experience
• Self-motivated learner with a passion for tools development, system architecture, and debugging.
• Strong communication, collaboration, and influencing skills to build effective partnerships across teams.

Advantages:

• In-depth knowledge of silicon process and validation
• Experience with FPGA, Emulation, Pre/Post-Silicon Validation, Logic Design, and Debug.
• Familiarity with Graphics, Display, Memory, Security, SoC, HSIO, Power-Management, and HW/SW integration.
• Strong lab skills, including system testing and debugging.
• Experience in driver or firmware development

Experienced HireShift 1 (Israel)Israel, Haifa

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

The Analytical labs in MVE are responsible for debug activities on Intel's next-generation products (CPUs, chipsets, and networking products) using the leading-edge technology.
In your role, you will be responsible for supporting the labs' daily maintenance activities.
You will also be responsible for troubleshooting and minor repairs of various equipment, performing preventive maintenance, communicating with vendors, purchasing, and providing other logistical support and some tasks may include physical efforts. You will also be part of the lab safety team.

Qualifications:

* Student of Associate Engineering, B.Sc., or any undergraduate academic degree, with a minimum of two remaining academic years towards the degree.

Good technical knowledge with hands-on experience in assembly, repairing, andproblem-solving.

* Previous experience in a technical field (electricity, mechanics, control, and more)An advantage to technical discipline studies like engineering in electrical, mechanical, or Control

Safety orientation.

* Excellent communication, problem-solving, planning, and organization skillsSelf-management - must

Ability to work a minimum of 4 days per week.

Student / InternShift 1 (Israel)Israel, Haifa

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.