Broadcom Verification Engineer 

United States, California, San Jose 

952562096

Job duties include:

• Verify a block or functional feature and lead it to closure.

• Write scalable and re-usable testbenches from scratch, using the framework of the verification methodology

• Create test cases, functional coverage models and bring the verification to closure

• Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.

• Participate in documentation of verification strategy including test plans, verification micro-architecture, coverage objects etc.

Requirements:

• Bachelor's degree in Electrical Engineering or related degree and 5+ years related experience or Master's degree in Electrical Engineering or related degree and 3+ years related experience

• Must have worked before through the entire ASIC cycle, right from conceptualization to TapeOut.

• Must have working knowledge in constrained random verification methodologies like UVM/VMM/OVM

• Must be proficient with System Verilog

• Should have good command over fundamental OOP principles.

Compensation and Benefits

The annual base salary range for this position is $91,200 - $152,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.