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Apple Emulation Verification Engineer United States, California, Cupertino 939513468
07.04.2025
As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium platform, followed by completing the detailed Emulation testplans.
- Minimum of BS + 10 years relevant industry experience
- Understanding of the tool flow from RTL to Emulation is a huge plus
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow
- Proven design verification skills
- Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions
- Experience with System Verilog verification environments including C/C++ DPI, UVM
- Experience with writing and debugging test FW
- Experience on any Scripting (Perl/Python/TCL)
- Excellent analytical and debug skills
- Experience in UVM Acceleration is plus
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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