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Apple Design Verification Engineer 
United States, California, Cupertino 
695944906

08.06.2025
  • Bachelor’s degree or foreign equivalent in Computer Engineering, Electrical Engineering or related field.
  • Education and/or experience must include each of the following skills:
  • Knowledge of Verilog RTL and Design RTL
  • RTL simulation and debugging, including simulating designs and debugging tools.
  • Computer and Processor architecture
  • Using Python, including performing automation tasks
  • Object Oriented Programming and understanding of System Verilog.
  • Data structures and programming, including developing verification infrastructure.
  • System Verilog, including knowledge of Testbench infrastructure coded in System Verilog
  • Knowledge of C++ and modeling infrastructure coded in C++