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Apple Design Verification Engineer United States, California, Cupertino 292871559
Today
- Master’s degree or foreign equivalent in Electrical Engineering or related field.
- Education and/or experience must include each of the following skills:
- Creating and maintaining Testbench environments using UVM to verify hardware designs.
- Knowledge of Object-Oriented Programming principles to create vertically reusable and hierarchical testbench components.
- Writing constrained random and directed tests in System Verilog to execute the test plan.
- Running simulations and debugging test failures to uncover hardware or software bugs.
- Verilog and System Verilog for test-bench and design.
- Digital Design for simulating and debugging test cases.
- Understanding computer architecture concepts for testing parts of processor pipeline and caches.
- Computer Machine Organization and programming knowledge
משרות נוספות שיכולות לעניין אותך
