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Apple ASIC Design Engineer - Pixel IP United States, California, Cupertino 26124492
18.11.2024
Description
In this front-end design role, your tasks will include: • Integrate large pixel-processing subsystems using SystemVerilog, connecting to high-performance on-chip networks using virtual memory addressing, adding Design-For-Test (DFT) logic, and managing clocks, resets, and power domains.• Writing detailed micro-architectural specifications.• Performing front-end implementation, including logic synthesis, clock & reset domain-crossing checks, static timing analysis, power analysis, logic equivalence checking.• Working with Physical Design teams for physical floorplanning and timing closure.• Collaborating with cross-functional teams to explore solutions that maximize performance while minimizing power and area.• Working closely with design verification and formal verification teams to debug and verify functionality and performance.
Minimum Qualifications
- BS and a minimum of 0 years relevant industry experience
Preferred Qualifications
- Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog.
- Industry exposure to and knowledge of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working with physical design teams for floorplanning and timing closure.
- Experience with system design methodologies that contain multiple clock domains.
- Experience in low-power design issues, tools, and methodologies including UPF power intent specification highly desired.
- Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
- Industry exposure to and knowledge of ASIC/FPGA design methodology including familiarity with relevant scripting languages (Python, Perl, TCL).
- Good collaboration skills with strong written and verbal communication skills.
- Experience working cross-functionally with integration, design, and verification teams to specify, design, and debug digital systems.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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