Minimum of BS + 3 years relevant industry experience.
Previous strong experience in media, video, pixel, or display designs.
A good understanding of timing/area/complexity tradeoffs for sophisticated data path design
Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB)
Experience in front-end implementation tasks such as synthesis, STA, and logic equivalence
Industry exposure to and knowledge of ASIC/FPGA design methodology
Strong collaboration skills
Outstanding written and verbal communication
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.