In this front-end design role, your tasks will include: • Integrate large pixel-processing subsystems using SystemVerilog, connecting to high-performance on-chip networks using virtual memory addressing, adding Design-For-Test (DFT) logic, and managing clocks, resets, and power domains.• Writing detailed micro-architectural specifications.• Performing front-end implementation, including logic synthesis, clock & reset domain-crossing checks, static timing analysis, power analysis, logic equivalence checking.• Working with Physical Design teams for physical floorplanning and timing closure.• Collaborating with cross-functional teams to explore solutions that maximize performance while minimizing power and area.• Working closely with design verification and formal verification teams to debug and verify functionality and performance.