מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Broadcom Design Verification Engineer United States, California, San Jose 117944673
Job Description:
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.
- The engineer will be responsible for a variety of advanced verification tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random & directed test cases against the specification. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. Candidate must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification.
Job Requirements:
A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
8+ year’s relevant industry work experience.
Experience in verifying designs at system level and block level.
Fluent knowledge of RTL verification methodologies including System Verilog.
Strong experience in ASIC design verification flows and DV methodologies
Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.
Strong and independent design debugging capability.
Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members.
Demonstrated ability to analyze and resolve complex verification trade-off scenarios.
Must have legal authorization to work in the US
The candidate should have expertise in some (or preferably all) of the following areas:
Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.
Experience working with Emulators and FPGA based prototyping is a plus.
Familiarity with overall chip design methodologies and tools
Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred
Compensation and Benefits
The annual base salary range for this position is $119,000 - $190,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
משרות נוספות שיכולות לעניין אותך
