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Apple Graphics Design Verification Engineer United States, Texas, Austin 103176384
04.05.2024
Key Qualifications
- Expertise with Verilog, System Verilog, UVM/OVM.
- Expertise with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi.
- Proven experience with Perl, Shell scripting, Makefiles, TCL.
- Strong experience with low-level programming of complex computer systems in C, C++.
- Strong experience working under strict schedule deadlines with the ability to manage multiple priorities.
- Excellent communication skills and ability to collaborate.
- Strong knowledge of computer architecture; graphics architecture is a plus.
- Good experience with code repositories; Perforce.
- Extensive experience with constrained random verification process, functional and code coverage, assertion methodology.
- Extensive experience debugging complex design and environmental issues.
Description
• Lead unit-level, subsystem, or top verification teams for logic blocks in graphics processing unit (GPU) designs.• Own overall development, execution, and tracking of team's test plans.• Architect test bench methodology using Universal Verification Methodology (UVM) and SV components.• Build testing stimulus, coverage, and regression strategy.• Own and maintain testbenches and BFMs.• Debug simulation and silicon GPU failures.• Drive discussions with design & micro-architecture teams, as well as with other multi-functional teams to coordinate unit-level or top-level verification efforts.• Generate and present weekly status to GPU leadership team.
Education & Experience
We are looking for candidates with a minimum of BS + 10 years of relevant experience.
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