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Apple Graphics Design Verification Engineer United States, Texas, Austin 57333381
14.04.2025
- BS + 3 years of relevant experience.
- Background in CPU or GPU architectures.
- Experience working with Verilog or other HDLs.
- Experience with verification language such as System Verilog/UVM/OVM.
- Experience working with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi.
- Experience working with GPU architectures.
- Understanding of constrained random verification process, functional/code coverage, and assertion methodology.
- Ability to manage multiple priorities under strict schedule deadlines.
- Experience in developing test bench components in UVM including checkers and monitors.
- Familiarity with Perl, Shell scripting, Makefiles, TCL.
- Prior exposure to code repositories like Perforce.
- Ability to work well on a team with experience in collaborating with other teams.
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