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Apple Graphics Design Verification Engineer United States, Texas, Austin 365080975
04.05.2024
Key Qualifications
- Expertise with Verilog.
- Expertise with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi.
- Experience with Perl, Shell scripting, Makefiles, TCL.
- Experience with low-level programming of complex computer systems in C, C++.
- Familiar with System Verilog.
- Familiar developing test bench components in UVM including checkers and monitors.
- Good experience working under strict schedule deadlines with the ability to manage multiple priorities.
- Excellent communication skills and ability to collaborate.
- Good knowledge of Computer Architecture; Graphics architecture is a plus.
- Experience with code repositories; Perforce.
- Experience with verification languages such as System Verilog/UVM/OVM.
- Clear understanding of constrained random verification process, functional and code coverage, assertion methodology is a plus.
Description
• Perform unit-level, subsystem, and top verification for logic blocks in graphics processing unit (GPU) designs.• Writing, executing, and tracking to test plans.• Develop test bench components in Universal Verification Methodology (UVM) including checkers and monitors.• Develop unit-level test sequences and handle regressions.• Writing and maintaining testbenches and BFMs.• Generating stimulus and implementing and analyzing coverage• Debug simulation and silicon GPU failures.• Work closely with design & micro-architecture teams to understand the functional goals of the design.• Collaborate with multi-functional teams to coordinate unit-level verification efforts.• Scripting and software engineering.• Have strong communication skills with good team-oriented approaches.
Education & Experience
We are looking for candidates with a minimum of BS + 3 years of relevant experience.
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